* [PATCH RFC 1/6] mci: add driver for Broadcom SDHCI
2026-09-01 15:12 [RFC PATCH 0/6] Add Raspberry Pi 5 initial support Andrei Lalaev
@ 2026-09-01 15:12 ` Andrei Lalaev
2026-09-01 15:12 ` [PATCH RFC 2/6] ARM: rpi: add Raspberry Pi 5 support Andrei Lalaev
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Andrei Lalaev @ 2026-09-01 15:12 UTC (permalink / raw)
To: barebox; +Cc: Andrei Lalaev
This adds support for Broadcom SDHCI controller found on BCM2712
SoCs. The driver was ported from U-Boot.
Signed-off-by: Andrei Lalaev <andrey.lalaev@gmail.com>
---
arch/arm/configs/rpi_v8a_defconfig | 1 +
drivers/mci/Kconfig | 5 ++
drivers/mci/Makefile | 1 +
drivers/mci/bcmstb-sdhci.c | 165 +++++++++++++++++++++++++++++++++++++
4 files changed, 172 insertions(+)
diff --git a/arch/arm/configs/rpi_v8a_defconfig b/arch/arm/configs/rpi_v8a_defconfig
index c29fe30701e8..90899218b192 100644
--- a/arch/arm/configs/rpi_v8a_defconfig
+++ b/arch/arm/configs/rpi_v8a_defconfig
@@ -92,6 +92,7 @@ CONFIG_USB_GADGET=y
CONFIG_MCI=y
CONFIG_MCI_BCM283X=y
CONFIG_MCI_BCM283X_SDHOST=y
+CONFIG_MCI_BCMSTB=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_LED_GPIO_OF=y
diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig
index 2c3365e723a4..eebf85db9f5f 100644
--- a/drivers/mci/Kconfig
+++ b/drivers/mci/Kconfig
@@ -154,6 +154,11 @@ config MCI_BCM283X_SDHOST
depends on ARCH_BCM283X || COMPILE_TEST
select MCI_SDHCI
+config MCI_BCMSTB
+ bool "MCI support for BCMSTB"
+ depends on ARCH_BCM283X || COMPILE_TEST
+ select MCI_SDHCI
+
config MCI_DOVE
bool "Marvell Dove SDHCI"
depends on ARCH_DOVE || COMPILE_TEST
diff --git a/drivers/mci/Makefile b/drivers/mci/Makefile
index 761f4187c079..eca997dccbd3 100644
--- a/drivers/mci/Makefile
+++ b/drivers/mci/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_MCI_ATMEL_SDHCI) += atmel-sdhci.o atmel-sdhci-common.o
obj-$(CONFIG_MCI_BCM283X) += mci-bcm2835.o
obj-$(CONFIG_MCI_BCM283X_SDHOST) += bcm2835-sdhost.o
obj-$(CONFIG_MCI_CADENCE_SDHCI) += cadence-sdhci.o cadence-sdhci6.o
+obj-$(CONFIG_MCI_BCMSTB) += bcmstb-sdhci.o
obj-$(CONFIG_MCI_DOVE) += dove-sdhci.o
pbl-$(CONFIG_MCI_ATMEL_PBL) += atmel_mci_pbl.o atmel_mci_common.o
pbl-$(CONFIG_MCI_ATMEL_SDHCI_PBL) += atmel-sdhci-pbl.o atmel-sdhci-common.o
diff --git a/drivers/mci/bcmstb-sdhci.c b/drivers/mci/bcmstb-sdhci.c
new file mode 100644
index 000000000000..f1275a8936ea
--- /dev/null
+++ b/drivers/mci/bcmstb-sdhci.c
@@ -0,0 +1,165 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * This code is ported from U-Boot by Andrei Lalaev <andrey.lalaev@gmail.com>
+ *
+ * The original code has the following copyright:
+ * (C) Copyright 2018 Cisco Systems, Inc.
+ * (C) Copyright 2019 Synamedia
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ */
+
+#include <common.h>
+#include <init.h>
+#include <mci.h>
+#include <malloc.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+
+#include "sdhci.h"
+
+#define BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY 52000000
+#define BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY 400000
+
+#define SDIO_CFG_CTRL 0x0
+#define SDIO_CFG_CTRL_SDCD_N_TEST_EN BIT(31)
+#define SDIO_CFG_CTRL_SDCD_N_TEST_LEV BIT(30)
+
+#define SDIO_CFG_SD_PIN_SEL 0x44
+#define SDIO_CFG_SD_PIN_SEL_MASK 0x3
+#define SDIO_CFG_SD_PIN_SEL_CARD BIT(1)
+
+struct sdhci_bcmstb_mci_host {
+ struct mci_host mci;
+ void __iomem *cfg_regs;
+ struct sdhci sdhci;
+};
+
+static inline struct sdhci_bcmstb_mci_host *to_sdhci_bcmstb_host(struct mci_host *mci)
+{
+ return container_of(mci, struct sdhci_bcmstb_mci_host, mci);
+}
+
+static int sdhci_brcmstb_init_2712(struct mci_host *mci, struct device *dev)
+{
+ struct sdhci_bcmstb_mci_host *host = to_sdhci_bcmstb_host(mci);
+ u32 reg;
+ int ret;
+
+ ret = sdhci_reset(&host->sdhci, SDHCI_RESET_ALL);
+ if (ret)
+ return ret;
+
+ sdhci_write8(&host->sdhci, SDHCI_POWER_CONTROL,
+ SDHCI_BUS_VOLTAGE_330 | SDHCI_BUS_POWER_EN);
+ udelay(400);
+
+ sdhci_write32(&host->sdhci, SDHCI_INT_ENABLE, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK);
+ sdhci_write32(&host->sdhci, SDHCI_SIGNAL_ENABLE, 0x00);
+
+ if (host->mci.host_caps & MMC_CAP_NONREMOVABLE) {
+ /* Force presence */
+ reg = readl(host->cfg_regs + SDIO_CFG_CTRL);
+ reg &= ~SDIO_CFG_CTRL_SDCD_N_TEST_LEV;
+ reg |= SDIO_CFG_CTRL_SDCD_N_TEST_EN;
+ writel(reg, host->cfg_regs + SDIO_CFG_CTRL);
+ } else {
+ /* Enable card detection line */
+ reg = readl(host->cfg_regs + SDIO_CFG_SD_PIN_SEL);
+ reg &= ~SDIO_CFG_SD_PIN_SEL_MASK;
+ reg |= SDIO_CFG_SD_PIN_SEL_CARD;
+ writel(reg, host->cfg_regs + SDIO_CFG_SD_PIN_SEL);
+ }
+
+ return 0;
+}
+
+static void sdhci_brcmstb_set_ios(struct mci_host *mci, struct mci_ios *ios)
+{
+ struct sdhci_bcmstb_mci_host *host = to_sdhci_bcmstb_host(mci);
+
+ if (ios->clock)
+ sdhci_set_clock(&host->sdhci, ios->clock, host->sdhci.max_clk);
+ sdhci_set_bus_width(&host->sdhci, ios->bus_width);
+}
+
+static int sdhci_brcmstb_send_cmd(struct mci_host *mci, struct mci_cmd *cmd)
+{
+ struct sdhci_bcmstb_mci_host *host = to_sdhci_bcmstb_host(mci);
+
+ return sdhci_send_command(&host->sdhci, cmd);
+}
+
+static int sdhci_brcmstb_execute_tuning(struct mci_host *mci, u32 opcode)
+{
+ struct sdhci_bcmstb_mci_host *host = to_sdhci_bcmstb_host(mci);
+
+ return sdhci_execute_tuning(&host->sdhci, opcode);
+}
+
+static const struct mci_ops bcmstb_sdhci_ops = {
+ .init = sdhci_brcmstb_init_2712,
+ .set_ios = sdhci_brcmstb_set_ios,
+ .send_cmd = sdhci_brcmstb_send_cmd,
+ .execute_tuning = sdhci_brcmstb_execute_tuning,
+};
+
+static int sdhci_bcmstb_probe(struct device *dev)
+{
+ struct sdhci_bcmstb_mci_host *host;
+ struct resource *iores_cfg;
+ struct resource *iores;
+ struct clk *clk;
+ int ret;
+
+ clk = clk_get(dev, NULL);
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ ret = clk_enable(clk);
+ if (ret)
+ return ret;
+
+ iores = dev_request_mem_resource_by_name(dev, "host");
+ if (IS_ERR(iores))
+ return PTR_ERR(iores);
+
+ iores_cfg = dev_request_mem_resource_by_name(dev, "cfg");
+ if (IS_ERR(iores))
+ return PTR_ERR(iores);
+
+ host = xzalloc(sizeof(*host));
+ host->mci.ops = bcmstb_sdhci_ops;
+ host->mci.hw_dev = dev;
+ host->mci.f_min = BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY;
+ host->mci.f_max = BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY;
+
+ host->cfg_regs = IOMEM(iores_cfg->start);
+
+ host->sdhci.base = IOMEM(iores->start);
+ host->sdhci.mci = &host->mci;
+
+ mci_of_parse(&host->mci);
+
+ ret = sdhci_setup_host(&host->sdhci);
+ if (ret) {
+ dev_err(dev, "Failed to setup SDHCI host");
+ return ret;
+ }
+
+ return mci_register(&host->mci);
+}
+
+static const struct of_device_id sdhci_bcmstb_compatible[] = {
+ { .compatible = "brcm,bcm2712-sdhci" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, sdhci_bcmstb_match);
+
+static struct driver sdhci_bcmstb_driver = {
+ .name = "sdhci-bcmstb",
+ .probe = sdhci_bcmstb_probe,
+ .of_compatible = DRV_OF_COMPAT(sdhci_bcmstb_compatible),
+};
+
+device_platform_driver(sdhci_bcmstb_driver);
--
2.55.0
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH RFC 2/6] ARM: rpi: add Raspberry Pi 5 support
2026-09-01 15:12 [RFC PATCH 0/6] Add Raspberry Pi 5 initial support Andrei Lalaev
2026-09-01 15:12 ` [PATCH RFC 1/6] mci: add driver for Broadcom SDHCI Andrei Lalaev
@ 2026-09-01 15:12 ` Andrei Lalaev
2026-09-01 15:12 ` [PATCH RFC 3/6] Documentation: bcm283x: " Andrei Lalaev
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Andrei Lalaev @ 2026-09-01 15:12 UTC (permalink / raw)
To: barebox; +Cc: Andrei Lalaev
Initial support of RPI 5 that should be enough to boot Linux.
All peripherals behind RP1 chip are not supported yet.
Tested peripherals:
- PL011 debug UART
- SD-Card
Signed-off-by: Andrei Lalaev <andrey.lalaev@gmail.com>
---
arch/arm/boards/raspberry-pi/lowlevel.c | 3 +++
arch/arm/boards/raspberry-pi/rpi-common.c | 11 +++++++++++
arch/arm/configs/rpi_v8a_defconfig | 1 +
arch/arm/dts/Makefile | 1 +
arch/arm/dts/bcm2712-rpi-5.dts | 4 ++++
arch/arm/dts/bcm2712-rpi.dtsi | 5 +++++
arch/arm/include/asm/system_info.h | 3 +++
arch/arm/mach-bcm283x/Kconfig | 6 ++++++
arch/arm/mach-bcm283x/core.c | 4 +++-
include/mach/bcm283x/mbox.h | 1 +
10 files changed, 38 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boards/raspberry-pi/lowlevel.c b/arch/arm/boards/raspberry-pi/lowlevel.c
index b3727d930ff7..8d2150f9bbd8 100644
--- a/arch/arm/boards/raspberry-pi/lowlevel.c
+++ b/arch/arm/boards/raspberry-pi/lowlevel.c
@@ -74,6 +74,7 @@ extern char __dtb_z_bcm2711_rpi_4_start[];
extern char __dtb_z_bcm2711_rpi_400_start[];
extern char __dtb_z_bcm2711_rpi_cm4_io_start[];
extern char __dtb_z_bcm2711_rpi_cm4s_io_start[];
+extern char __dtb_z_bcm2712_rpi_5_start[];
RPI_ENTRY_FUNCTION(start_raspberry_pi1, SZ_128M, fdt)
{
@@ -142,6 +143,8 @@ static void *rpi_get_board_fdt(int rev)
return DT_IF_ENABLED(__dtb_z_bcm2711_rpi_cm4_io_start, CONFIG_MACH_RPI4);
case BCM2711_BOARD_REV_CM4_S:
return DT_IF_ENABLED(__dtb_z_bcm2711_rpi_cm4s_io_start, CONFIG_MACH_RPI4);
+ case BCM2712_BOARD_REV_5:
+ return DT_IF_ENABLED(__dtb_z_bcm2712_rpi_5_start, CONFIG_MACH_RPI5);
}
return NULL;
diff --git a/arch/arm/boards/raspberry-pi/rpi-common.c b/arch/arm/boards/raspberry-pi/rpi-common.c
index 754772da460f..fe0b11efad68 100644
--- a/arch/arm/boards/raspberry-pi/rpi-common.c
+++ b/arch/arm/boards/raspberry-pi/rpi-common.c
@@ -175,6 +175,7 @@ static int rpi_mem_init(void)
if (!of_machine_is_compatible("brcm,bcm2837") &&
!of_machine_is_compatible("brcm,bcm2835") &&
!of_machine_is_compatible("brcm,bcm2711") &&
+ !of_machine_is_compatible("brcm,bcm2712") &&
!of_machine_is_compatible("brcm,bcm2836"))
return 0;
@@ -732,6 +733,13 @@ static const struct rpi_machine_data rpi_4_ids[] = {
},
};
+static const struct rpi_machine_data rpi_5_ids[] = {
+ {
+ .hw_id = BCM2712_BOARD_REV_5,
+ }, {
+ .hw_id = U8_MAX
+ },
+};
static const struct of_device_id rpi_of_match[] = {
/* BCM2835 based Boards */
{ .compatible = "raspberrypi,model-a", .data = rpi_1_ids },
@@ -762,6 +770,9 @@ static const struct of_device_id rpi_of_match[] = {
{ .compatible = "raspberrypi,4-compute-module-s", .data = rpi_4_ids },
{ .compatible = "raspberrypi,400", .data = rpi_4_ids },
+ /* BCM2712 based Boards */
+ { .compatible = "raspberrypi,5-model-b", .data = rpi_5_ids },
+
{ /* sentinel */ },
};
BAREBOX_DEEP_PROBE_ENABLE(rpi_of_match);
diff --git a/arch/arm/configs/rpi_v8a_defconfig b/arch/arm/configs/rpi_v8a_defconfig
index 90899218b192..7c95b4b2f313 100644
--- a/arch/arm/configs/rpi_v8a_defconfig
+++ b/arch/arm/configs/rpi_v8a_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARCH_BCM283X=y
CONFIG_MACH_RPI3=y
CONFIG_MACH_RPI_CM3=y
CONFIG_MACH_RPI4=y
+CONFIG_MACH_RPI5=y
CONFIG_64BIT=y
CONFIG_IMAGE_COMPRESSION_NONE=y
CONFIG_NAME="rpi_v8a_defconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 64f46064b735..56e022286182 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -146,6 +146,7 @@ lwl-$(CONFIG_MACH_RPI2) += bcm2836-rpi-2.dtb.o
lwl-$(CONFIG_MACH_RPI3) += bcm2837-rpi-3.dtb.o
lwl-$(CONFIG_MACH_RPI_CM3) += bcm2837-rpi-cm3.dtb.o
lwl-$(CONFIG_MACH_RPI4) += bcm2711-rpi-4.dtb.o bcm2711-rpi-400.dtb.o bcm2711-rpi-cm4-io.dtb.o bcm2711-rpi-cm4s-io.dtb.o
+lwl-$(CONFIG_MACH_RPI5) += bcm2712-rpi-5.dtb.o
lwl-$(CONFIG_MACH_SABRELITE) += imx6q-sabrelite.dtb.o imx6dl-sabrelite.dtb.o imx6q-sabrelite-qemu.dtb.o
lwl-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o imx6qp-sabresd.dtb.o imx6dl-sabresd.dtb.o
lwl-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += imx6sx-sdb.dtb.o
diff --git a/arch/arm/dts/bcm2712-rpi-5.dts b/arch/arm/dts/bcm2712-rpi-5.dts
new file mode 100644
index 000000000000..c9754555993a
--- /dev/null
+++ b/arch/arm/dts/bcm2712-rpi-5.dts
@@ -0,0 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <arm64/broadcom/bcm2712-rpi-5-b.dts>
+#include "bcm2712-rpi.dtsi"
diff --git a/arch/arm/dts/bcm2712-rpi.dtsi b/arch/arm/dts/bcm2712-rpi.dtsi
new file mode 100644
index 000000000000..9ca671d8df7b
--- /dev/null
+++ b/arch/arm/dts/bcm2712-rpi.dtsi
@@ -0,0 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ barebox,deep-probe;
+};
diff --git a/arch/arm/include/asm/system_info.h b/arch/arm/include/asm/system_info.h
index 5a84fde75b9f..aa13a8531a05 100644
--- a/arch/arm/include/asm/system_info.h
+++ b/arch/arm/include/asm/system_info.h
@@ -50,6 +50,9 @@
#define CPU_IS_CORTEX_A72 0x410fd080
#define CPU_IS_CORTEX_A72_MASK 0xff0ffff0
+#define CPU_IS_CORTEX_A76 0x410fd0b0
+#define CPU_IS_CORTEX_A76_MASK 0xff0ffff0
+
#define CPU_IS_PXA250 0x69052100
#define CPU_IS_PXA250_MASK 0xfffff7f0
diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
index ca9061572b06..78dfa9dd87ce 100644
--- a/arch/arm/mach-bcm283x/Kconfig
+++ b/arch/arm/mach-bcm283x/Kconfig
@@ -47,6 +47,12 @@ config MACH_RPI4
select MACH_RPI_AARCH_32_64
select MACH_RPI_COMMON
+config MACH_RPI5
+ bool "RaspberryPi 5 (BCM2712/CORTEX-A76)"
+ depends on 64BIT
+ select CPU_V8
+ select MACH_RPI_COMMON
+
endmenu
endif
diff --git a/arch/arm/mach-bcm283x/core.c b/arch/arm/mach-bcm283x/core.c
index 1091ad0b5664..6c6aa5726a25 100644
--- a/arch/arm/mach-bcm283x/core.c
+++ b/arch/arm/mach-bcm283x/core.c
@@ -13,7 +13,7 @@ void __iomem *bcm2835_get_mmio_base_by_cpuid(void)
pr_debug("ARM CPUID: %08x\n", cpuid);
}
- /* We know ARM1167, Cortex A-7, A-53 and A-72 CPUID mask is identical */
+ /* We know ARM1167, Cortex A-7, A-53, A-72, A-76 CPUID mask is identical */
switch(cpuid & CPU_IS_ARM1176_MASK) {
case CPU_IS_ARM1176: /* bcm2835 */
return IOMEM(0x20000000);
@@ -22,6 +22,8 @@ void __iomem *bcm2835_get_mmio_base_by_cpuid(void)
return IOMEM(0x3f000000);
case CPU_IS_CORTEX_A72: /* bcm2711 */
return IOMEM(0xfe000000);
+ case CPU_IS_CORTEX_A76: /* bcm2712 */
+ return IOMEM(0x107c008000UL);
}
pr_err("Couldn't determine rpi by CPUID %08x\n", cpuid);
diff --git a/include/mach/bcm283x/mbox.h b/include/mach/bcm283x/mbox.h
index fc51b6597560..0f3cd9c8211f 100644
--- a/include/mach/bcm283x/mbox.h
+++ b/include/mach/bcm283x/mbox.h
@@ -178,6 +178,7 @@ struct bcm2835_mbox_tag_hdr {
#define BCM2711_BOARD_REV_400 0x13
#define BCM2711_BOARD_REV_CM4 0x14
#define BCM2711_BOARD_REV_CM4_S 0x15
+#define BCM2712_BOARD_REV_5 0x17
struct bcm2835_mbox_tag_get_board_rev {
struct bcm2835_mbox_tag_hdr tag_hdr;
--
2.55.0
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH RFC 3/6] Documentation: bcm283x: add Raspberry Pi 5 support
2026-09-01 15:12 [RFC PATCH 0/6] Add Raspberry Pi 5 initial support Andrei Lalaev
2026-09-01 15:12 ` [PATCH RFC 1/6] mci: add driver for Broadcom SDHCI Andrei Lalaev
2026-09-01 15:12 ` [PATCH RFC 2/6] ARM: rpi: add Raspberry Pi 5 support Andrei Lalaev
@ 2026-09-01 15:12 ` Andrei Lalaev
2026-09-01 15:12 ` [PATCH RFC 4/6] arm: dts: bcm2712-rpi: specify clock frequency for uart Andrei Lalaev
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Andrei Lalaev @ 2026-09-01 15:12 UTC (permalink / raw)
To: barebox; +Cc: Andrei Lalaev
Raspberry Pi 5 is supported now, so update the corresponding line.
Signed-off-by: Andrei Lalaev <andrey.lalaev@gmail.com>
---
Documentation/boards/bcm2835.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/boards/bcm2835.rst b/Documentation/boards/bcm2835.rst
index a05ae3c6f2ed..4f9bf3371006 100644
--- a/Documentation/boards/bcm2835.rst
+++ b/Documentation/boards/bcm2835.rst
@@ -29,8 +29,8 @@ over SD or Ethernet on the Raspberry Pi 4.
``barebox.img``.
For 64-bit, only ``images/barebox-raspberry-pi.img`` will be created, which is usable
- for both Raspberry Pi 3 and Raspberry Pi 4 in 64-bit mode (``arm_64bit`` in ``config.txt``).
- No support for the Raspberry Pi 5 has been contributed yet.
+ for both Raspberry Pi 3 and Raspberry Pi 4 in 64-bit mode (``arm_64bit`` in ``config.txt``)
+ and for Raspberry Pi 5.
The ``images/barebox-raspberry-pi.img`` is expected to be the sole image for 32-bit
also in the future. It contains the device trees of all supported (and enabled) variants
--
2.55.0
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH RFC 4/6] arm: dts: bcm2712-rpi: specify clock frequency for uart
2026-09-01 15:12 [RFC PATCH 0/6] Add Raspberry Pi 5 initial support Andrei Lalaev
` (2 preceding siblings ...)
2026-09-01 15:12 ` [PATCH RFC 3/6] Documentation: bcm283x: " Andrei Lalaev
@ 2026-09-01 15:12 ` Andrei Lalaev
2026-09-01 15:13 ` [PATCH RFC 5/6] arm: dts: bcm2712-rpi: disable wifi SDIO Andrei Lalaev
2026-09-01 15:13 ` [PATCH RFC 6/6] bcm283x: debug_ll: add Raspberry Pi 5 UART support Andrei Lalaev
5 siblings, 0 replies; 7+ messages in thread
From: Andrei Lalaev @ 2026-09-01 15:12 UTC (permalink / raw)
To: barebox; +Cc: Andrei Lalaev
RPI bootloader sets `clocks/clk-uart/clock-frequency` in the DTB
to this value. Set it accordingly to get a working debug UART
at 115200 baud.
Signed-off-by: Andrei Lalaev <andrey.lalaev@gmail.com>
---
arch/arm/dts/bcm2712-rpi.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/bcm2712-rpi.dtsi b/arch/arm/dts/bcm2712-rpi.dtsi
index 9ca671d8df7b..e58138512194 100644
--- a/arch/arm/dts/bcm2712-rpi.dtsi
+++ b/arch/arm/dts/bcm2712-rpi.dtsi
@@ -3,3 +3,7 @@
/ {
barebox,deep-probe;
};
+
+&clk_uart {
+ clock-frequency = <44236800>;
+};
--
2.55.0
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH RFC 5/6] arm: dts: bcm2712-rpi: disable wifi SDIO
2026-09-01 15:12 [RFC PATCH 0/6] Add Raspberry Pi 5 initial support Andrei Lalaev
` (3 preceding siblings ...)
2026-09-01 15:12 ` [PATCH RFC 4/6] arm: dts: bcm2712-rpi: specify clock frequency for uart Andrei Lalaev
@ 2026-09-01 15:13 ` Andrei Lalaev
2026-09-01 15:13 ` [PATCH RFC 6/6] bcm283x: debug_ll: add Raspberry Pi 5 UART support Andrei Lalaev
5 siblings, 0 replies; 7+ messages in thread
From: Andrei Lalaev @ 2026-09-01 15:13 UTC (permalink / raw)
To: barebox; +Cc: Andrei Lalaev
WiFi/BT is not needed for booting and the SDIO device doesn't response with
the error:
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: SDHCI_INT_ERROR: 0x000c8001
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: ============ SDHCI REGISTER DUMP ===========
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Sys addr: 0x00000000 | Version: 0x00001002
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Blk size: 0x00000000 | Blk cnt: 0x00000000
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Argument: 0x00000000 | Trn mode: 0x00000000
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Present: 0x000f0000 | Host ctl: 0x00000000
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Power: 0x0000000f | Blk gap: 0x00000080
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Wake-up: 0x00000000 | Clock: 0x0000fa07
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Timeout: 0x0000000e | Int stat: 0x000c8001
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Int enab: 0x077f003f | Sig enab: 0x00000000
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: ACmd stat: 0x00000000 | Slot int: 0x00000000
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Caps: 0x55eec832 | Caps_1: 0x8000a527
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Cmd: 0x0000371a | Max curr: 0x00080008
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Resp[0]: 0x00000000 | Resp[1]: 0x00000000
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Resp[2]: 0x00000000 | Resp[3]: 0x00000000
ERROR: sdhci-bcmstb 1001100000.mmc@1100000.of: Host ctl2: 0x00000000
Therefore disable it.
Signed-off-by: Andrei Lalaev <andrey.lalaev@gmail.com>
---
arch/arm/dts/bcm2712-rpi.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/bcm2712-rpi.dtsi b/arch/arm/dts/bcm2712-rpi.dtsi
index e58138512194..1ee16ba527f1 100644
--- a/arch/arm/dts/bcm2712-rpi.dtsi
+++ b/arch/arm/dts/bcm2712-rpi.dtsi
@@ -7,3 +7,8 @@ / {
&clk_uart {
clock-frequency = <44236800>;
};
+
+/* WiFi SDIO */
+&sdio2 {
+ status = "disabled";
+};
--
2.55.0
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH RFC 6/6] bcm283x: debug_ll: add Raspberry Pi 5 UART support
2026-09-01 15:12 [RFC PATCH 0/6] Add Raspberry Pi 5 initial support Andrei Lalaev
` (4 preceding siblings ...)
2026-09-01 15:13 ` [PATCH RFC 5/6] arm: dts: bcm2712-rpi: disable wifi SDIO Andrei Lalaev
@ 2026-09-01 15:13 ` Andrei Lalaev
5 siblings, 0 replies; 7+ messages in thread
From: Andrei Lalaev @ 2026-09-01 15:13 UTC (permalink / raw)
To: barebox; +Cc: Andrei Lalaev
This commit adds support for low-level debugging using UART debug port
on Raspberry Pi 5.
Signed-off-by: Andrei Lalaev <andrey.lalaev@gmail.com>
---
common/Kconfig.debug_ll | 8 ++++++++
include/mach/bcm283x/debug_ll.h | 10 ++++++++++
include/mach/bcm283x/platform.h | 1 +
3 files changed, 19 insertions(+)
diff --git a/common/Kconfig.debug_ll b/common/Kconfig.debug_ll
index 6126431692eb..c6091979bfa3 100644
--- a/common/Kconfig.debug_ll
+++ b/common/Kconfig.debug_ll
@@ -301,6 +301,14 @@ config DEBUG_RPI4_MINI_UART
Say Y here if you want low-level debugging support on
RaspberryPi 4 board mini UART.
+config DEBUG_RPI5_UART
+ bool "RaspberryPi 5 PL011 UART"
+ depends on ARCH_BCM283X
+ select DEBUG_BCM283X_UART
+ help
+ Say Y here if you want low-level debugging support on
+ RaspberryPi 5 boards.
+
config DEBUG_ZYNQ_UART
bool "Zynq debug UART"
depends on ARCH_ZYNQ
diff --git a/include/mach/bcm283x/debug_ll.h b/include/mach/bcm283x/debug_ll.h
index 3f2d5ddc9857..7562fe977e87 100644
--- a/include/mach/bcm283x/debug_ll.h
+++ b/include/mach/bcm283x/debug_ll.h
@@ -113,6 +113,16 @@ static inline void PUTC_LL(char c)
debug_ll_ns16550_putc(base, c);
}
+#elif defined CONFIG_DEBUG_RPI5_UART
+
+static inline void debug_ll_init(void)
+{
+ /* Configured by ROM */
+}
+
+#define DEBUG_LL_UART_ADDR BCM2712_PL011_BASE
+#include <debug_ll/pl011.h>
+
#else
static inline void debug_ll_init(void)
diff --git a/include/mach/bcm283x/platform.h b/include/mach/bcm283x/platform.h
index 54d8b38bd8ed..a25bde84ee16 100644
--- a/include/mach/bcm283x/platform.h
+++ b/include/mach/bcm283x/platform.h
@@ -36,6 +36,7 @@
#define BCM2835_MINIUART_BASE 0x20215040
#define BCM2836_MINIUART_BASE 0x3f215040UL
#define BCM2711_MINIUART_BASE 0xfe215040UL
+#define BCM2712_PL011_BASE 0x107d001000UL
#endif
--
2.55.0
^ permalink raw reply [flat|nested] 7+ messages in thread