From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH 4/4] clk: imx: pll14xx: hit 393216000 and 361267200 Hz exactly
Date: Wed, 30 Sep 2026 12:15:56 +0200 [thread overview]
Message-ID: <20260930101606.2097864-4-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20260930101606.2097864-1-a.fatoum@pengutronix.de>
The table entries for the two audio PLL rates only approximate them:
they program 393215995 and 361267196 Hz. Linux commit 72d00e560d10
("clk: imx: pll14xx: dynamically configure PLL for
393216000/361267200Hz") dropped them in favor of dynamically computed
dividers that hit the rates exactly.
barebox has no dynamic rate calculation, so replace the entries with
the equivalent hardcoded values that I had listed in the Linux
commit above.
This is visible after boot: Linux finds the requested rate reachable
from barebox's dividers by adjusting kdiv alone, keeps them and ends up
a few Hz short, whereas after U-Boot, which doesn't touch the audio
PLLs, it locked in exactly.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
drivers/clk/imx/clk-pll14xx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index 939320c0590f..3390a3ffc754 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -64,8 +64,8 @@ static const struct imx_pll14xx_rate_table imx_pll1443x_tbl[] = {
PLL_1443X_RATE(650000000U, 325, 3, 2, 0),
PLL_1443X_RATE(594000000U, 198, 2, 2, 0),
PLL_1443X_RATE(519750000U, 173, 2, 2, 16384),
- PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),
- PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),
+ PLL_1443X_RATE(393216000U, 655, 5, 3, 23593),
+ PLL_1443X_RATE(361267200U, 497, 33, 0, -16882),
};
struct imx_pll14xx_clk imx_1443x_pll = {
--
2.47.3
next prev parent reply other threads:[~2026-09-30 10:17 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 10:15 [PATCH 1/4] clk: imx: pll14xx: use register defines consistently Ahmad Fatoum
2026-09-30 10:15 ` [PATCH 2/4] clk: imx: pll14xx: Drop wrong shifting Ahmad Fatoum
2026-09-30 10:15 ` [PATCH 3/4] clk: imx: pll14xx: Use FIELD_GET/FIELD_PREP Ahmad Fatoum
2026-09-30 10:15 ` Ahmad Fatoum [this message]
2026-10-01 20:21 ` [PATCH 1/4] clk: imx: pll14xx: use register defines consistently Sascha Hauer
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