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* [PATCH 0/2] arm: socfpga: agilex5: remove custom GPIO toggle
@ 2026-10-07 14:57 Michael Tretter
  2026-10-07 14:57 ` [PATCH 1/2] arm: socfpga: agilex5: select GPIOLIB Michael Tretter
  2026-10-07 14:57 ` [PATCH 2/2] arm: socfpga: axe5-eagle: drop hard-coded PHY reset in board code Michael Tretter
  0 siblings, 2 replies; 3+ messages in thread
From: Michael Tretter @ 2026-10-07 14:57 UTC (permalink / raw)
  To: Sascha Hauer, BAREBOX; +Cc: Michael Tretter

The Arrow AXE5 Eagle board has some custom code for toggling the reset
of the Ethernet phy, because barebox is built without GPIOLIB for binary
size reasons. These limits are not clearly defined, not reliably
reproducible and not enforced.

With xloading of the SSBL, the GPIOLIB doesn't have an effect on the
FSBL size anymore. Otherwise, disabling a few drivers is probably more
significant than disabling the GPIOLIB.

Therefore, enable GPIOLIB for the Agilex 5, and get rid of the custom
code to toggle the GPIO for resetting the Ethernet phy.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
Michael Tretter (2):
      arm: socfpga: agilex5: select GPIOLIB
      arm: socfpga: axe5-eagle: drop hard-coded PHY reset in board code

 arch/arm/boards/arrow-axe5-eagle/board.c | 24 ------------------------
 arch/arm/mach-socfpga/Kconfig            |  1 +
 2 files changed, 1 insertion(+), 24 deletions(-)
---
base-commit: 70421fc4591e6b4b9c7172ca72b60ef1868ecc5c
change-id: 20261007-socfpga-agilex5-gpiolib-a3a32b295925

Best regards,
-- 
Michael Tretter <m.tretter@pengutronix.de>




^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH 1/2] arm: socfpga: agilex5: select GPIOLIB
  2026-10-07 14:57 [PATCH 0/2] arm: socfpga: agilex5: remove custom GPIO toggle Michael Tretter
@ 2026-10-07 14:57 ` Michael Tretter
  2026-10-07 14:57 ` [PATCH 2/2] arm: socfpga: axe5-eagle: drop hard-coded PHY reset in board code Michael Tretter
  1 sibling, 0 replies; 3+ messages in thread
From: Michael Tretter @ 2026-10-07 14:57 UTC (permalink / raw)
  To: Sascha Hauer, BAREBOX; +Cc: Michael Tretter

GPIOLIB is disabled on the Agilex 5 Board, because it adds about 1k to
the piggy data for barebox proper. During experiments, this added about
1k to the FSBL image, which pushed the size over some undocumented limit
that prevented the board from booting.

Since there is no actual size check for the barebox image, there is no
guarantee that the socfpga-agilex5_defconfig will result in an image
that meets the size restriction. Therefore, some tuning of the config
and disabling of various driver is required for some specific board,
anyway.

Enabling the GPIOLIB for one board will also enable it for all other
boards, unless there is a dependency that GPIOLIB is disabled and makes
board mutually exclusive.

If the piggy data is removed from the FSBL and loaded as SSBL, the size
of the piggy data is not restricted anymore, and the option has not
drawback anymore.

Therefore, select and enable GPIOLIB because its features are very
useful, and not having it causes more trouble for questionable gain.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 arch/arm/mach-socfpga/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index a836711e6c40..38b9ed4dfb39 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -30,6 +30,7 @@ config ARCH_SOCFPGA_AGILEX5
 	select FIRMWARE_AGILEX5_ATF
 	select ARM_ATF
 	select ARM_SMCCC
+	select GPIOLIB
 
 if 32BIT
 

-- 
2.47.3




^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH 2/2] arm: socfpga: axe5-eagle: drop hard-coded PHY reset in board code
  2026-10-07 14:57 [PATCH 0/2] arm: socfpga: agilex5: remove custom GPIO toggle Michael Tretter
  2026-10-07 14:57 ` [PATCH 1/2] arm: socfpga: agilex5: select GPIOLIB Michael Tretter
@ 2026-10-07 14:57 ` Michael Tretter
  1 sibling, 0 replies; 3+ messages in thread
From: Michael Tretter @ 2026-10-07 14:57 UTC (permalink / raw)
  To: Sascha Hauer, BAREBOX; +Cc: Michael Tretter

Since GPIOLIB is now enabled for Agilex 5, the Ethernet driver resets
the Ethernet phy via the GPIO.

Remove the hard-coded reset code from the Arrow AXE5 board code.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 arch/arm/boards/arrow-axe5-eagle/board.c | 24 ------------------------
 1 file changed, 24 deletions(-)

diff --git a/arch/arm/boards/arrow-axe5-eagle/board.c b/arch/arm/boards/arrow-axe5-eagle/board.c
index b197367f45e4..1ce48385f80d 100644
--- a/arch/arm/boards/arrow-axe5-eagle/board.c
+++ b/arch/arm/boards/arrow-axe5-eagle/board.c
@@ -3,33 +3,9 @@
 #include <init.h>
 #include <io.h>
 #include <bbu.h>
-#include <mach/socfpga/soc64-regs.h>
-
-static void axe5_ethernet_phy_reset(void)
-{
-	writel(0x14, SOCFPGA_PINMUX_ADDRESS + 0x224);
-	writel(0x14, SOCFPGA_PINMUX_ADDRESS + 0x228);
-	writel(0x14, SOCFPGA_PINMUX_ADDRESS + 0x23c);
-	writel(0x14, SOCFPGA_PINMUX_ADDRESS + 0x234);
-	writel(0x14, SOCFPGA_PINMUX_ADDRESS + 0x248);
-	writel(0x14, SOCFPGA_PINMUX_ADDRESS + 0x24c);
-
-	writel(0x410, 0x10c03304);
-	writel(0x410, 0x10c03300);
-	/*
-	 * reset the phy via GPIO10. We currently haven't got enough space
-	 * to enable the gpio driver in barebox.
-	 */
-	writel(0x000, 0x10c03300);
-	/* FIXME:  can this be decreased? */
-	mdelay(1000);
-	writel(0x410, 0x10c03300);
-}
 
 static int axe5_probe(struct device *dev)
 {
-	axe5_ethernet_phy_reset();
-
 	return 0;
 }
 

-- 
2.47.3




^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2026-10-07 14:58 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-10-07 14:57 [PATCH 0/2] arm: socfpga: agilex5: remove custom GPIO toggle Michael Tretter
2026-10-07 14:57 ` [PATCH 1/2] arm: socfpga: agilex5: select GPIOLIB Michael Tretter
2026-10-07 14:57 ` [PATCH 2/2] arm: socfpga: axe5-eagle: drop hard-coded PHY reset in board code Michael Tretter

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