From: Michael Tretter <m.tretter@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>,
BAREBOX <barebox@lists.infradead.org>
Cc: Michael Tretter <m.tretter@pengutronix.de>
Subject: [PATCH 10/11] arm: socfpga: axe5-eagle: move lowlevel init to separate function
Date: Wed, 07 Oct 2026 12:55:55 +0200 [thread overview]
Message-ID: <20261007-socfpga-agilex5-xload-v1-10-f8fb2d2819da@pengutronix.de> (raw)
In-Reply-To: <20261007-socfpga-agilex5-xload-v1-0-f8fb2d2819da@pengutronix.de>
Move the lowlevel initialization to a separate function to be able to
reuse it in the xload entry point.
Drop the debug message that lowlevel init is finished, because the
message isn't really useful.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
arch/arm/boards/arrow-axe5-eagle/lowlevel.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boards/arrow-axe5-eagle/lowlevel.c b/arch/arm/boards/arrow-axe5-eagle/lowlevel.c
index b0a2d6673e0f..bf98515f28d8 100644
--- a/arch/arm/boards/arrow-axe5-eagle/lowlevel.c
+++ b/arch/arm/boards/arrow-axe5-eagle/lowlevel.c
@@ -13,7 +13,7 @@
extern char __dtb_z_socfpga_agilex5_axe5_eagle_start[];
-static noinline void axe5_eagle_continue(void)
+static void axe5_eagle_lowlevel_init(void)
{
void __iomem *uart = IOMEM(SOCFPGA_UART_BASE(0));
@@ -21,8 +21,11 @@ static noinline void axe5_eagle_continue(void)
socfpga_uart_setup(uart);
pbl_set_putc(socfpga_uart_putc, uart);
+}
- pr_debug("Lowlevel init done\n");
+static noinline void axe5_eagle_continue(void)
+{
+ axe5_eagle_lowlevel_init();
agilex5_barebox_entry(__dtb_z_socfpga_agilex5_axe5_eagle_start);
}
--
2.47.3
next prev parent reply other threads:[~2026-10-07 11:15 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-07 10:55 [PATCH 00/11] arm: socfpga: agilex5: add xload support for bl33 to FSBL Michael Tretter
2026-10-07 10:55 ` [PATCH 01/11] mtd: spi-nor: drop requirement for device field Michael Tretter
2026-10-07 10:55 ` [PATCH 02/11] mtd: spi-nor: enable module in PBL Michael Tretter
2026-10-07 10:55 ` [PATCH 03/11] mtd: spi-nor: cadence: extract common part for use " Michael Tretter
2026-10-07 10:55 ` [PATCH 04/11] mtd: spi-nor: cadence: add a PBL driver Michael Tretter
2026-10-07 10:55 ` [PATCH 05/11] arm: socfpga: agilex5: add bl33 xload support Michael Tretter
2026-10-07 10:55 ` [PATCH 06/11] arm: socfpga: agilex5: separate load and start of bl33 Michael Tretter
2026-10-07 10:55 ` [PATCH 07/11] arm: socfpga: agilex5: enable xload for bl33 Michael Tretter
2026-10-07 10:55 ` [PATCH 08/11] arm: socfpga: agilex5: initialize QSPI flash in PBL Michael Tretter
2026-10-07 12:11 ` Michael Tretter
2026-10-07 10:55 ` [PATCH 09/11] arm: socfpga: agilex5: add agilex5_barebox_entry_xload Michael Tretter
2026-10-07 10:55 ` Michael Tretter [this message]
2026-10-07 10:55 ` [PATCH 11/11] arm: socfpga: axe5-eagle: build FSBL without piggy data Michael Tretter
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