From: Michael Tretter <m.tretter@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>,
BAREBOX <barebox@lists.infradead.org>
Cc: Michael Tretter <m.tretter@pengutronix.de>
Subject: [PATCH 06/11] arm: socfpga: agilex5: separate load and start of bl33
Date: Wed, 07 Oct 2026 12:55:51 +0200 [thread overview]
Message-ID: <20261007-socfpga-agilex5-xload-v1-6-f8fb2d2819da@pengutronix.de> (raw)
In-Reply-To: <20261007-socfpga-agilex5-xload-v1-0-f8fb2d2819da@pengutronix.de>
Extract loading of the bl33 to a separate function. This allows a
cleaner separation for adding the bl33 xload from another medium.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
arch/arm/mach-socfpga/atf.c | 37 ++++++++++++++++++++++++++++++++-----
1 file changed, 32 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-socfpga/atf.c b/arch/arm/mach-socfpga/atf.c
index ac69fb7776ca..4bf13a464657 100644
--- a/arch/arm/mach-socfpga/atf.c
+++ b/arch/arm/mach-socfpga/atf.c
@@ -12,6 +12,8 @@
#include <mach/socfpga/soc64-sdram.h>
#include <mach/socfpga/soc64-system-manager.h>
+#include <pbl/bio.h>
+
static void socfpga_agilex5_qspi_init(void)
{
unsigned long master_ref_clk = 0;
@@ -36,16 +38,38 @@ static void socfpga_agilex5_qspi_init(void)
}
}
-static void __noreturn agilex5_load_and_start_image_via_tfa(void)
+static int agilex5_load_bl33_piggy(void *bl33)
{
- void *bl31 = (void *)AGILEX5_ATF_BL31_BASE_ADDR;
- void *bl33 = (void *)AGILEX5_ATF_BL33_BASE_ADDR;
- struct fwobj tfa;
+ /*
+ * Do not use input_data and input_data_end, to ensure that the
+ * piggydata can be stripped in the FSBL.
+ */
+ if (barebox_image_size <= barebox_pbl_size)
+ return -EINVAL;
pr_debug("copy bl33 to %p from %p (%zu bytes)\n",
bl33, __image_start, barebox_image_size);
memcpy(bl33, __image_start, barebox_image_size);
+ return 0;
+}
+
+static void agilex5_load_bl33(struct pbl_bio *bio, void *bl33)
+{
+ int ret;
+
+ ret = agilex5_load_bl33_piggy(bl33);
+ if (ret == 0)
+ return;
+
+ panic("No barebox image found!\n");
+}
+
+static void __noreturn agilex5_start_image_via_tfa(void *bl33)
+{
+ void *bl31 = (void *)AGILEX5_ATF_BL31_BASE_ADDR;
+ struct fwobj tfa;
+
get_builtin_firmware(agilex5_bl31_bin, &tfa);
pr_debug("copy bl31 to %p from %p (%zu bytes)\n",
@@ -63,6 +87,7 @@ static void __noreturn agilex5_load_and_start_image_via_tfa(void)
static void agilex5_el3_init(void)
{
+ void *bl33 = (void *)AGILEX5_ATF_BL33_BASE_ADDR;
int ret;
agilex5_initialize_security_policies();
@@ -74,7 +99,9 @@ static void agilex5_el3_init(void)
socfpga_agilex5_qspi_init();
- agilex5_load_and_start_image_via_tfa();
+ agilex5_load_bl33(NULL, bl33);
+
+ agilex5_start_image_via_tfa(bl33);
}
void __noreturn agilex5_barebox_entry(void *fdt)
--
2.47.3
next prev parent reply other threads:[~2026-10-07 10:57 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-07 10:55 [PATCH 00/11] arm: socfpga: agilex5: add xload support for bl33 to FSBL Michael Tretter
2026-10-07 10:55 ` [PATCH 01/11] mtd: spi-nor: drop requirement for device field Michael Tretter
2026-10-07 10:55 ` [PATCH 02/11] mtd: spi-nor: enable module in PBL Michael Tretter
2026-10-07 10:55 ` [PATCH 03/11] mtd: spi-nor: cadence: extract common part for use " Michael Tretter
2026-10-07 10:55 ` [PATCH 04/11] mtd: spi-nor: cadence: add a PBL driver Michael Tretter
2026-10-07 10:55 ` [PATCH 05/11] arm: socfpga: agilex5: add bl33 xload support Michael Tretter
2026-10-07 10:55 ` Michael Tretter [this message]
2026-10-07 10:55 ` [PATCH 07/11] arm: socfpga: agilex5: enable xload for bl33 Michael Tretter
2026-10-07 10:55 ` [PATCH 08/11] arm: socfpga: agilex5: initialize QSPI flash in PBL Michael Tretter
2026-10-07 12:11 ` Michael Tretter
2026-10-07 10:55 ` [PATCH 09/11] arm: socfpga: agilex5: add agilex5_barebox_entry_xload Michael Tretter
2026-10-07 10:55 ` [PATCH 10/11] arm: socfpga: axe5-eagle: move lowlevel init to separate function Michael Tretter
2026-10-07 10:55 ` [PATCH 11/11] arm: socfpga: axe5-eagle: build FSBL without piggy data Michael Tretter
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