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From: Michael Grzeschik <grzeschik@puzzle.ch>
To: Sascha Hauer <s.hauer@pengutronix.de>,
	 "open list:BAREBOX" <barebox@lists.infradead.org>
Cc: Michael Grzeschik <grzeschik@puzzle.ch>
Subject: [PATCH 3/6] gpio: orion: do not let banks without alias collide
Date: Tue, 03 Nov 2026 22:31:09 +0100	[thread overview]
Message-ID: <20261103-orion_kw_mvebu-v1-3-86442c0d283e@puzzle.ch> (raw)
In-Reply-To: <20261103-orion_kw_mvebu-v1-0-86442c0d283e@puzzle.ch>

The driver uses the "gpio" alias index to place a bank in the global
GPIO number space and leaves the base at 0 when there is no alias. The
Kirkwood device trees have no gpio aliases, so both banks were
registered at base 0. gpiochip_add() then rejected the second bank with
-EBUSY, which the driver ignored, so every user of gpio1 deferred
forever:

  gpio-leds gpio-leds.of: error Requested probe deferral: getting gpio for /gpio-leds/led-level
  gpio_keys gpio_keys.of: error Requested probe deferral: requesting gpio #0

Let gpiolib choose the base when there is no alias, and fail the probe
with an error message if the chip cannot be registered.

Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Michael Grzeschik <grzeschik@puzzle.ch>
---
 drivers/gpio/gpio-orion.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpio-orion.c b/drivers/gpio/gpio-orion.c
index ef7d1ff114..994ba1926e 100644
--- a/drivers/gpio/gpio-orion.c
+++ b/drivers/gpio/gpio-orion.c
@@ -83,7 +83,7 @@ static int orion_gpio_probe(struct device *dev)
 {
 	struct resource *iores;
 	struct orion_gpio_chip *gpio;
-	int id;
+	int id, ret;
 
 	gpio = xzalloc(sizeof(*gpio));
 	iores = dev_request_mem_resource(dev, 0);
@@ -95,14 +95,26 @@ static int orion_gpio_probe(struct device *dev)
 	gpio->chip.dev = dev;
 	gpio->chip.ops = &orion_gpio_ops;
 
+	/*
+	 * Without a gpio alias, let gpiolib pick the base. Defaulting to 0
+	 * made the second bank of Kirkwood SoCs collide with the first one.
+	 */
 	id = of_alias_get_id(dev->of_node, "gpio");
 	if (id >= 0)
 		gpio->chip.base = id * 32;
+	else
+		gpio->chip.base = -1;
 
 	gpio->chip.ngpio = 32;
 	of_property_read_u32(dev->of_node, "ngpios", &gpio->chip.ngpio);
 
-	gpiochip_add(&gpio->chip);
+	ret = gpiochip_add(&gpio->chip);
+	if (ret) {
+		dev_err(dev, "failed to register gpio chip: %pe\n", ERR_PTR(ret));
+		release_region(iores);
+		free(gpio);
+		return ret;
+	}
 
 	dev_dbg(dev, "probed gpio%d with base %d\n", dev->id, gpio->chip.base);
 

-- 
2.53.0




  parent reply	other threads:[~2026-11-03 21:32 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-03 21:31 [PATCH 0/6] orion/kw/mvebu: stability/usability patches Michael Grzeschik
2026-11-03 21:31 ` [PATCH 1/6] images: mvebu: skip images whose binary header is missing Michael Grzeschik
2026-11-03 21:31 ` [PATCH 2/6] mtd: nand: orion: set Hamming ECC algorithm in ->attach_chip() Michael Grzeschik
2026-11-03 21:31 ` Michael Grzeschik [this message]
2026-11-03 21:31 ` [PATCH 4/6] filetype: detect kwbimage v0 images for NAND boot Michael Grzeschik
2026-11-03 21:31 ` [PATCH 5/6] mtd: nand: orion: register the NAND device as "nand" Michael Grzeschik
2026-11-03 21:31 ` [PATCH 6/6] gpio: orion: register at coredevice level Michael Grzeschik

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