* [PATCH 1/1] zedboard: add support for usb
@ 2021-05-03 14:08 Michael Graichen
2021-05-05 8:19 ` Lucas Stach
0 siblings, 1 reply; 3+ messages in thread
From: Michael Graichen @ 2021-05-03 14:08 UTC (permalink / raw)
To: barebox
This adds minimalistic support for USB on the Zedboard/Zynq-7000
>From e1e1cdc8e2f82a5c9ecb4acc8eb67181687791d0 Mon Sep 17 00:00:00 2001
From: Michael Graichen <michael.graichen@hotmail.com>
Date: Mon, 3 May 2021 16:08:23 +0200
Subject: [PATCH] zedboard: add support for usb
Signed-off-by: Michael Graichen <michael.graichen@hotmail.com>
---
arch/arm/boards/avnet-zedboard/lowlevel.c | 13 +++++++
drivers/usb/host/Kconfig | 6 +++
drivers/usb/host/Makefile | 1 +
drivers/usb/host/ehci-zynq.c | 47 +++++++++++++++++++++++
drivers/usb/otg/ulpi.c | 1 +
5 files changed, 68 insertions(+)
create mode 100644 drivers/usb/host/ehci-zynq.c
diff --git a/arch/arm/boards/avnet-zedboard/lowlevel.c b/arch/arm/boards/avnet-zedboard/lowlevel.c
index f7bdceb42..e43832218 100644
--- a/arch/arm/boards/avnet-zedboard/lowlevel.c
+++ b/arch/arm/boards/avnet-zedboard/lowlevel.c
@@ -236,6 +236,19 @@ static void avnet_zedboard_ps7_init(void)
writel(0x00000702, ZYNQ_MIO_BASE + 0x14);
writel(0x00000702, ZYNQ_MIO_BASE + 0x18);
writel(0x00000602, ZYNQ_MIO_BASE + 0x20);
+ /* USB0 */
+ writel(0x00000304, ZYNQ_MIO_BASE + 0x70); // MIO_PIN_28 => OTG_DATA_4
+ writel(0x00000305, ZYNQ_MIO_BASE + 0x74); // MIO_PIN_29 => OTG_DIR
+ writel(0x00000304, ZYNQ_MIO_BASE + 0x78); // MIO_PIN_30 => OTG_STP
+ writel(0x00000305, ZYNQ_MIO_BASE + 0x7c); // MIO_PIN_31 => OTG_NXT
+ writel(0x00000304, ZYNQ_MIO_BASE + 0x80); // MIO_PIN_32 => OTG_DATA_0
+ writel(0x00000304, ZYNQ_MIO_BASE + 0x84); // MIO_PIN_33 => OTG_DATA_1
+ writel(0x00000304, ZYNQ_MIO_BASE + 0x88); // MIO_PIN_34 => OTG_DATA_2
+ writel(0x00000304, ZYNQ_MIO_BASE + 0x8c); // MIO_PIN_35 => OTG_DATA_3
+ writel(0x00000305, ZYNQ_MIO_BASE + 0x90); // MIO_PIN_36 => OTG-CLK
+ writel(0x00000304, ZYNQ_MIO_BASE + 0x94); // MIO_PIN_37 => OTG_DATA_5
+ writel(0x00000304, ZYNQ_MIO_BASE + 0x98); // MIO_PIN_38 => OTG_DATA_6
+ writel(0x00000304, ZYNQ_MIO_BASE + 0x9c); // MIO_PIN_39 => OTG_DATA_7
/* poor mans clkctrl */
writel(0x00001403, ZYNQ_CLOCK_CTRL_BASE + ZYNQ_UART_CLK_CTRL);
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 891523c4d..fcd90824c 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -13,6 +13,12 @@ config USB_EHCI_ATMEL
select USB_OHCI_AT91
bool "Atmel EHCI driver"
+config USB_EHCI_ZYNQ
+ bool "Support for Xilinx Zynq on-chip EHCI USB controller"
+ depends on ARCH_ZYNQ
+ help
+ Enable support for Zynq on-chip EHCI USB controller
+
config USB_OHCI
bool "OHCI driver"
depends on !MMU && HAS_DMA
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index e7a6cf213..eef038128 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -1,6 +1,7 @@
obj-$(CONFIG_USB_EHCI) += ehci-hcd.o
obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
obj-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o
+obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
obj-$(CONFIG_USB_OHCI) += ohci-hcd.o
obj-$(CONFIG_USB_OHCI_AT91) += ohci-at91.o
obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o
diff --git a/drivers/usb/host/ehci-zynq.c b/drivers/usb/host/ehci-zynq.c
new file mode 100644
index 000000000..4246960e1
--- /dev/null
+++ b/drivers/usb/host/ehci-zynq.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * USB Low level initialization(Specific to Zynq 7000)
+ */
+
+#include <common.h>
+#include <usb/ulpi.h>
+
+struct zynq_ehci_priv {
+ struct device_d *dev;
+ void __iomem *base;
+};
+
+static int zynq_ehci_probe(struct device_d *dev)
+{
+ struct zynq_ehci_priv *pdata;
+ struct resource *res;
+ void __iomem *base;
+
+ pdata = xzalloc(sizeof(*pdata));
+ pdata->dev = dev;
+ dev->priv = pdata;
+
+ res = dev_get_resource(dev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -EINVAL;
+
+ base = IOMEM(res->start);
+ pdata->base = base;
+
+ ulpi_setup(base + 0x170, 1);
+ add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, (unsigned int)base, NULL);
+
+ return 0;
+}
+
+static const struct of_device_id zynq_ehci_dt_ids[] = {
+ { .compatible = "xlnx,zynq-usb-2.20a" },
+ { /* sentinel */ }
+};
+
+static struct driver_d zynq_ehci_driver = {
+ .name = "zynq-ehci",
+ .probe = zynq_ehci_probe,
+ .of_compatible = DRV_OF_COMPAT(zynq_ehci_dt_ids),
+};
+device_platform_driver(zynq_ehci_driver);
diff --git a/drivers/usb/otg/ulpi.c b/drivers/usb/otg/ulpi.c
index 9bc432fa8..38210150e 100644
--- a/drivers/usb/otg/ulpi.c
+++ b/drivers/usb/otg/ulpi.c
@@ -144,6 +144,7 @@ struct ulpi_info {
static struct ulpi_info ulpi_ids[] = {
ULPI_INFO(ULPI_ID(0x04cc, 0x1504), "NXP ISP150x"),
ULPI_INFO(ULPI_ID(0x0424, 0x0006), "SMSC USB331x"),
+ ULPI_INFO(ULPI_ID(0x0451, 0x1507), "TI TUSB1210"),
};
static int ulpi_read_id(void __iomem *view, int *vid, int *pid)
--
2.25.1
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH 1/1] zedboard: add support for usb
2021-05-03 14:08 [PATCH 1/1] zedboard: add support for usb Michael Graichen
@ 2021-05-05 8:19 ` Lucas Stach
2021-05-18 8:05 ` AW: " Michael Graichen
0 siblings, 1 reply; 3+ messages in thread
From: Lucas Stach @ 2021-05-05 8:19 UTC (permalink / raw)
To: Michael Graichen, barebox
Hi Michael,
Am Montag, dem 03.05.2021 um 14:08 +0000 schrieb Michael Graichen:
> This adds minimalistic support for USB on the Zedboard/Zynq-7000
This change does 3 distinct things and should be split in 3 patches to
do one thing at a time:
- add Zynq EHCI support
- add ULPI PHY ID
- add Zedboard USB pinmux
> From e1e1cdc8e2f82a5c9ecb4acc8eb67181687791d0 Mon Sep 17 00:00:00 2001
> From: Michael Graichen <michael.graichen@hotmail.com>
> Date: Mon, 3 May 2021 16:08:23 +0200
> Subject: [PATCH] zedboard: add support for usb
>
> Signed-off-by: Michael Graichen <michael.graichen@hotmail.com>
> ---
> arch/arm/boards/avnet-zedboard/lowlevel.c | 13 +++++++
> drivers/usb/host/Kconfig | 6 +++
> drivers/usb/host/Makefile | 1 +
> drivers/usb/host/ehci-zynq.c | 47 +++++++++++++++++++++++
> drivers/usb/otg/ulpi.c | 1 +
> 5 files changed, 68 insertions(+)
> create mode 100644 drivers/usb/host/ehci-zynq.c
>
> diff --git a/arch/arm/boards/avnet-zedboard/lowlevel.c b/arch/arm/boards/avnet-zedboard/lowlevel.c
> index f7bdceb42..e43832218 100644
> --- a/arch/arm/boards/avnet-zedboard/lowlevel.c
> +++ b/arch/arm/boards/avnet-zedboard/lowlevel.c
> @@ -236,6 +236,19 @@ static void avnet_zedboard_ps7_init(void)
> writel(0x00000702, ZYNQ_MIO_BASE + 0x14);
> writel(0x00000702, ZYNQ_MIO_BASE + 0x18);
> writel(0x00000602, ZYNQ_MIO_BASE + 0x20);
> + /* USB0 */
> + writel(0x00000304, ZYNQ_MIO_BASE + 0x70); // MIO_PIN_28 => OTG_DATA_4
> + writel(0x00000305, ZYNQ_MIO_BASE + 0x74); // MIO_PIN_29 => OTG_DIR
> + writel(0x00000304, ZYNQ_MIO_BASE + 0x78); // MIO_PIN_30 => OTG_STP
> + writel(0x00000305, ZYNQ_MIO_BASE + 0x7c); // MIO_PIN_31 => OTG_NXT
> + writel(0x00000304, ZYNQ_MIO_BASE + 0x80); // MIO_PIN_32 => OTG_DATA_0
> + writel(0x00000304, ZYNQ_MIO_BASE + 0x84); // MIO_PIN_33 => OTG_DATA_1
> + writel(0x00000304, ZYNQ_MIO_BASE + 0x88); // MIO_PIN_34 => OTG_DATA_2
> + writel(0x00000304, ZYNQ_MIO_BASE + 0x8c); // MIO_PIN_35 => OTG_DATA_3
> + writel(0x00000305, ZYNQ_MIO_BASE + 0x90); // MIO_PIN_36 => OTG-CLK
> + writel(0x00000304, ZYNQ_MIO_BASE + 0x94); // MIO_PIN_37 => OTG_DATA_5
> + writel(0x00000304, ZYNQ_MIO_BASE + 0x98); // MIO_PIN_38 => OTG_DATA_6
> + writel(0x00000304, ZYNQ_MIO_BASE + 0x9c); // MIO_PIN_39 => OTG_DATA_7
>
>
> /* poor mans clkctrl */
> writel(0x00001403, ZYNQ_CLOCK_CTRL_BASE + ZYNQ_UART_CLK_CTRL);
> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
> index 891523c4d..fcd90824c 100644
> --- a/drivers/usb/host/Kconfig
> +++ b/drivers/usb/host/Kconfig
> @@ -13,6 +13,12 @@ config USB_EHCI_ATMEL
> select USB_OHCI_AT91
> bool "Atmel EHCI driver"
>
>
> +config USB_EHCI_ZYNQ
> + bool "Support for Xilinx Zynq on-chip EHCI USB controller"
> + depends on ARCH_ZYNQ
> + help
> + Enable support for Zynq on-chip EHCI USB controller
> +
Maybe update the defconfig too, if it doesn't blow up the image size
too much?
> config USB_OHCI
> bool "OHCI driver"
> depends on !MMU && HAS_DMA
> diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
> index e7a6cf213..eef038128 100644
> --- a/drivers/usb/host/Makefile
> +++ b/drivers/usb/host/Makefile
> @@ -1,6 +1,7 @@
> obj-$(CONFIG_USB_EHCI) += ehci-hcd.o
> obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
> obj-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o
> +obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
> obj-$(CONFIG_USB_OHCI) += ohci-hcd.o
> obj-$(CONFIG_USB_OHCI_AT91) += ohci-at91.o
> obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o
> diff --git a/drivers/usb/host/ehci-zynq.c b/drivers/usb/host/ehci-zynq.c
> new file mode 100644
> index 000000000..4246960e1
> --- /dev/null
> +++ b/drivers/usb/host/ehci-zynq.c
> @@ -0,0 +1,47 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * USB Low level initialization(Specific to Zynq 7000)
> + */
> +
> +#include <common.h>
> +#include <usb/ulpi.h>
> +
> +struct zynq_ehci_priv {
> + struct device_d *dev;
> + void __iomem *base;
> +};
> +
> +static int zynq_ehci_probe(struct device_d *dev)
> +{
> + struct zynq_ehci_priv *pdata;
pdata isn't used anywhere AFAICS, maybe drop it and simplify the code?
Regards,
Lucas
> + struct resource *res;
> + void __iomem *base;
> +
> + pdata = xzalloc(sizeof(*pdata));
> + pdata->dev = dev;
> + dev->priv = pdata;
> +
> + res = dev_get_resource(dev, IORESOURCE_MEM, 0);
> + if (!res)
> + return -EINVAL;
> +
> + base = IOMEM(res->start);
> + pdata->base = base;
> +
> + ulpi_setup(base + 0x170, 1);
> + add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, (unsigned int)base, NULL);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id zynq_ehci_dt_ids[] = {
> + { .compatible = "xlnx,zynq-usb-2.20a" },
> + { /* sentinel */ }
> +};
> +
> +static struct driver_d zynq_ehci_driver = {
> + .name = "zynq-ehci",
> + .probe = zynq_ehci_probe,
> + .of_compatible = DRV_OF_COMPAT(zynq_ehci_dt_ids),
> +};
> +device_platform_driver(zynq_ehci_driver);
> diff --git a/drivers/usb/otg/ulpi.c b/drivers/usb/otg/ulpi.c
> index 9bc432fa8..38210150e 100644
> --- a/drivers/usb/otg/ulpi.c
> +++ b/drivers/usb/otg/ulpi.c
> @@ -144,6 +144,7 @@ struct ulpi_info {
> static struct ulpi_info ulpi_ids[] = {
> ULPI_INFO(ULPI_ID(0x04cc, 0x1504), "NXP ISP150x"),
> ULPI_INFO(ULPI_ID(0x0424, 0x0006), "SMSC USB331x"),
> + ULPI_INFO(ULPI_ID(0x0451, 0x1507), "TI TUSB1210"),
> };
>
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^ permalink raw reply [flat|nested] 3+ messages in thread
* AW: [PATCH 1/1] zedboard: add support for usb
2021-05-05 8:19 ` Lucas Stach
@ 2021-05-18 8:05 ` Michael Graichen
0 siblings, 0 replies; 3+ messages in thread
From: Michael Graichen @ 2021-05-18 8:05 UTC (permalink / raw)
To: Lucas Stach, barebox
Hey Lucas,
[...]
> This change does 3 distinct things and should be split in 3 patches to
> do one thing at a time:
> - add Zynq EHCI support
> - add ULPI PHY ID
> - add Zedboard USB pinmux
no problem, I can split this is separate patches.
[...]
> Maybe update the defconfig too, if it doesn't blow up the image size
> too much?
This is the harder part. It actually needs support of CONFIG_USB_ULPI and CONFIG_USB_EHCI
+config USB_EHCI_ZYNQ
+ bool "Support for Xilinx Zynq on-chip EHCI USB controller"
+ depends on ARCH_ZYNQ
+ select USB_EHCI
+ select USB_ULPI
+ help
+ Enable support for Zynq on-chip EHCI USB controller
+
and that will blow up the image size, because ethernet is selected in zynq_defconfig right now.
If you want to do somethink usefull, like CONFIG_USB_STORAGE, with it its even worse.
That's why I came up with the two stage boot process from the other patch.
[...]
> pdata isn't used anywhere AFAICS, maybe drop it and simplify the code?
right, I'll remove that.
best regards
Michael
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2021-05-18 8:05 ` AW: " Michael Graichen
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