Re: [PATCH] ARM: dts: socfpga: AXE5-Eagle: fix phy reset

[Michael Tretter <m.tretter@pengutronix.de>]

On Mon, 27 Apr 2026 09:20:41 +0200, Sascha Hauer wrote:
> On Wed, Apr 22, 2026 at 05:56:11PM +0200, Michael Tretter wrote:
> > The snps,reset-gpio is a property of the Synopsys DesignWare MAC and
> > belongs into the gmac node.
> > 
> > The property is deprecated and shall be replaced by regular gpio reset
> > at the phy. However, use the deprecated binding to be sure that the
> > dwmac driver handles the reset for now.
> 
> So what's missing to handle the regular gpio reset at phy level?

I tested this with a reset at the phy level and it works just fine. I'll
send a v2 with a regular gpio reset at phy level.

Michael

> 
> Would be good to have that information in the commit message.
> 
> Sascha
> 
> > 
> > Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
> > ---
> >  arch/arm/dts/socfpga_agilex5_axe5_eagle.dts | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/arch/arm/dts/socfpga_agilex5_axe5_eagle.dts b/arch/arm/dts/socfpga_agilex5_axe5_eagle.dts
> > index f67b974f2adc..732d6142dcb1 100644
> > --- a/arch/arm/dts/socfpga_agilex5_axe5_eagle.dts
> > +++ b/arch/arm/dts/socfpga_agilex5_axe5_eagle.dts
> > @@ -74,16 +74,16 @@ &gmac2 {
> >  	status = "okay";
> >  	phy-mode = "rgmii-id";
> >  	phy-handle = <&emac2_phy0>;
> > -
> >  	max-frame-size = <9000>;
> > +	snps,reset-gpio = <&portb 10 GPIO_ACTIVE_LOW>;
> > +	snps,reset-active-low;
> > +	snps,reset-delays-us = <0 10000 10000>;
> >  
> >  	mdio0 {
> >  		#address-cells = <1>;
> >  		#size-cells = <0>;
> >  		compatible = "snps,dwmac-mdio";
> >  		emac2_phy0: ethernet-phy@1 {
> > -			snps,reset-gpio = <&portb 10 GPIO_ACTIVE_LOW>;
> > -			snps,reset-delays-us = <0 10000 10000>;
> >  			reg = <0x1>;
> >  			adi,rx-internal-delay-ps = <2000>;
> >  			adi,tx-internal-delay-ps = <2000>;
> > 
> > ---
> > base-commit: 7b492daea9347fd55bf29560c2ec494ca1040f95
> > change-id: 20260422-socfpga-agilex5-dwmac-9d45a7c123a8