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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: Antony Pavlov <antonynpavlov@gmail.com>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH] spi: add STM32 SPI controller driver
Date: Thu, 18 Nov 2021 13:32:18 +0100	[thread overview]
Message-ID: <c166fe6f-7265-cc58-5d68-1f3dd2b424a3@pengutronix.de> (raw)
In-Reply-To: <20211108200117.7d0df0b548e029ff580855b2@gmail.com>

Hello Antony,

On 08.11.21 18:01, Antony Pavlov wrote:
> On Fri,  5 Nov 2021 08:46:57 +0100
> Ahmad Fatoum <a.fatoum@pengutronix.de> wrote:
> 
>> Tested on a STM32MP1 communicating with a ksz9563.
> 
> ...
> 
>> diff --git a/drivers/spi/stm32_spi.c b/drivers/spi/stm32_spi.c
>> new file mode 100644
>> index 000000000000..0cb04a968c8a
>> --- /dev/null
>> +++ b/drivers/spi/stm32_spi.c
>> @@ -0,0 +1,590 @@
>> +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
>> +/*
>> + * Copyright (C) 2019, STMicroelectronics - All Rights Reserved
>> + *
>> + * Driver for STMicroelectronics Serial peripheral interface (SPI)
>> + */
>> +
> 
> ...
> 
>> +/* STM32_SPI_CR2 bit fields */
>> +#define SPI_CR2_TSIZE		GENMASK(15, 0)
> 
> So SPI_CR2_TSIZE is (64K - 1)
> 
> ...
> 
>> +
>> +static int stm32_spi_transfer_one(struct stm32_spi_priv *priv,
>> +				  struct spi_transfer *t)
>> +{
>> +	struct device_d *dev = priv->master.dev;
>> +	u32 sr;
>> +	u32 ifcr = 0;
>> +	u32 mode;
>> +	int xfer_status = 0;
>> +
>> +	if (t->len <= SPI_CR2_TSIZE)
>> +		writel(t->len, priv->base + STM32_SPI_CR2);
>> +	else
>> +		return -EMSGSIZE;
> 
> So stm32_spi_transfer_one() can transfer no more than (64K - 1).
> At the other hand imd tends to read more than  (64K - 1) from SPI flash, e.g.
> 
>   barebox:/ imd /dev/m25p0
>   imd: error 90
> 
> Here is my solution for handling SPI flash by stm32 SPI driver (not tested on stm32):

Thanks for the input. I believe I have STM32 with a SPI flash, where
I should be able to test this. I'll report back once I come around to it.

Can I have your Signed-off-by for this patch here?

> 
> +#include <linux/spi/spi-mem.h>
> +
> +static int stm32_spi_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
> +{
> +	if (op->data.nbytes > SPI_CR2_TSIZE) {
> +		op->data.nbytes = SPI_CR2_TSIZE;
> +	}
> +
> +	return 0;
> +}
> +
> +static int stm32_spi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> +{
> +	return -ENOTSUPP;
> +}
> +
> +static const struct spi_controller_mem_ops stm32_spi_mem_ops = {
> +	.adjust_op_size = stm32_spi_adjust_op_size,
> +	.exec_op = stm32_spi_exec_op,
> +};
> +
> 
> ...
> 
> @@ static int stm32_spi_probe(struct device_d *dev)
> 
> ...
> 
> 	master->setup = stm32_spi_setup;
> 	master->transfer = stm32_spi_transfer;
> +	master->mem_ops = &stm32_spi_mem_ops;
> 	master->bus_num = -1;
> 	stm32_spi_dt_probe(priv);
> 


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  reply	other threads:[~2021-11-18 12:34 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-05  7:46 Ahmad Fatoum
2021-11-05  9:24 ` Sascha Hauer
2021-11-08 17:01 ` Antony Pavlov
2021-11-18 12:32   ` Ahmad Fatoum [this message]
2021-11-19  8:36     ` Antony Pavlov

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