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* [PATCH] ARM: DTS: make rpi3/4 use pl011 uart as primary
@ 2022-06-11 18:28 Daniel Brát
  2022-06-15  8:24 ` Ahmad Fatoum
  0 siblings, 1 reply; 2+ messages in thread
From: Daniel Brát @ 2022-06-11 18:28 UTC (permalink / raw)
  To: barebox; +Cc: Daniel Brát

When the videocore first-stage bootloader finds 'dtoverlay=disable-bt' in the
'config.txt', asides from applying said overlay, it also disables fixed
clock for the vpu, which miniuart requires to calculate correct baudrate,
rendering it non-functional. This can be fixed by adding 'core_freq=250'
to the config, but since barebox has drivers for the pl011 full-fledged UART,
lets just make barebox use it instead.

Signed-off-by: Daniel Brát <danek.brat@gmail.com>
---
 arch/arm/dts/bcm2711-rpi-4.dts       |  8 +-------
 arch/arm/dts/bcm2837-rpi-3.dts       |  2 ++
 arch/arm/dts/rpi-use-pl011-uart.dtsi | 24 ++++++++++++++++++++++++
 3 files changed, 27 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/dts/rpi-use-pl011-uart.dtsi

diff --git a/arch/arm/dts/bcm2711-rpi-4.dts b/arch/arm/dts/bcm2711-rpi-4.dts
index 3c0caa73f..e082ad868 100644
--- a/arch/arm/dts/bcm2711-rpi-4.dts
+++ b/arch/arm/dts/bcm2711-rpi-4.dts
@@ -9,10 +9,4 @@
 	status = "disabled";
 };
 
-&uart1 {
-	/* VPU core clock is reported at 200MHz, but needs to be 500Mhz
-	 * for ns16550 driver to set correct baudrate. Until that's
-	 * figured out, hardcode clock frequency to the expected value
-	 */
-	clock-frequency = <500000000>;
-};
+#include "rpi-use-pl011-uart.dtsi"
diff --git a/arch/arm/dts/bcm2837-rpi-3.dts b/arch/arm/dts/bcm2837-rpi-3.dts
index e82d518fa..6af9e9d7c 100644
--- a/arch/arm/dts/bcm2837-rpi-3.dts
+++ b/arch/arm/dts/bcm2837-rpi-3.dts
@@ -7,3 +7,5 @@
 &sdhci {
 	status = "disabled";
 };
+
+#include "rpi-use-pl011-uart.dtsi"
diff --git a/arch/arm/dts/rpi-use-pl011-uart.dtsi b/arch/arm/dts/rpi-use-pl011-uart.dtsi
new file mode 100644
index 000000000..7c75b07f8
--- /dev/null
+++ b/arch/arm/dts/rpi-use-pl011-uart.dtsi
@@ -0,0 +1,24 @@
+/* https://www.raspberrypi.com/documentation/computers/configuration.html#primary-and-secondary-uart */
+
+/* Makes barebox use pl011 uart as primary */
+
+&uart1 {
+        status = "disabled";
+};
+
+&uart0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart0_gpio14>;
+        status = "okay";
+};
+
+/delete-node/ &bt;
+
+&{/aliases} {
+        serial0 = &uart0;
+        serial1 = &uart1;
+};
+
+&{/chosen} {
+        stdout-path = "/serial0:115200n8";
+};
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] ARM: DTS: make rpi3/4 use pl011 uart as primary
  2022-06-11 18:28 [PATCH] ARM: DTS: make rpi3/4 use pl011 uart as primary Daniel Brát
@ 2022-06-15  8:24 ` Ahmad Fatoum
  0 siblings, 0 replies; 2+ messages in thread
From: Ahmad Fatoum @ 2022-06-15  8:24 UTC (permalink / raw)
  To: Daniel Brát, barebox

Hello Daniel,

On 11.06.22 20:28, Daniel Brát wrote:
> When the videocore first-stage bootloader finds 'dtoverlay=disable-bt' in the
> 'config.txt', asides from applying said overlay, it also disables fixed
> clock for the vpu, which miniuart requires to calculate correct baudrate,
> rendering it non-functional. This can be fixed by adding 'core_freq=250'
> to the config, but since barebox has drivers for the pl011 full-fledged UART,
> lets just make barebox use it instead.

For me on the Raspberry Pi 4 64-bit, boot rpi is now silent
with this patch applied.

I have

  enable_uart=1
  uart_2ndstage=1
  arm_64bit=1
  [pi4]
  arm_boost=1

in my config.txt. Boot log below. Any ideas?

Booting entry 'rpi'
Adding "earlycon=pl011,0xfe201000,115200n8" to Kernel commandline

Loading GZIP compressed '/boot/kernel8.img'
Adding "earlycon=pl011,0xfe201000,115200n8" to Kernel commandline

Loading ARM aarch64 Linux image '/tmp/bootm-compressed-6504dc00'
Loading devicetree from '/vc.dtb'
commandline: earlycon=pl011,0xfe201000,115200n8   coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1  smsc95xx.macaddr=DC:A6:32:44:7E:4C vc_mem.mem_base=0x3ec00000 vc_mem.mem_size=0x40000000  console=ttyS0,115200 console=tty1 root=PARTUUID=286db7ac-02 rootfstype=ext4 fsck.repair=yes rootwait
Loaded kernel to 0x00200000, devicetree at 0x017f0000
[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd083]
[    0.000000] Linux version 5.15.32-v8+ (dom@buildbot) (aarch64-linux-gnu-gcc-8 (Ubuntu/Linaro 8.4.0-3ubuntu1) 8.4.0, GNU ld (GNU Binutils for Ubuntu) 2.34) #1538 SMP PREEMPT Thu Mar 31 19:40:39 BST 2022
[    0.000000] random: fast init done
[    0.000000] Machine model: Raspberry Pi 4 Model B Rev 1.1
[    0.000000] earlycon: pl11 at MMIO 0x00000000fe201000 (options '115200n8')
[    0.000000] printk: bootconsole [pl11] enabled
[    0.000000] efi: UEFI not found.
[    0.000000] Reserved memory: created CMA memory pool at 0x000000000ac00000, size 320 MiB
[    0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000000000000-0x000000003b3fffff]
[    0.000000]   DMA32    empty
[    0.000000]   Normal   empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x000000003b3fffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000003b3fffff]
[    0.000000] percpu: Embedded 28 pages/cpu s77144 r8192 d29352 u114688
[    0.000000] Detected PIPT I-cache on CPU0
[    0.000000] CPU features: detected: Spectre-v2
[    0.000000] CPU features: detected: Spectre-v4
[    0.000000] CPU features: detected: Spectre-BHB
[    0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 238896
[    0.000000] Kernel command line: earlycon=pl011,0xfe201000,115200n8   coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1  smsc95xx.macaddr=DC:A6:32:44:7E:4C vc_mem.mem_base=0x3ec00000 vc_mem.mem_size=0x40000000  console=ttyS0,115200 console=tty1 root=PARTUUID=286db7ac-02 rootfstype=ext4 fsck.repair=yes rootwait
[    0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[    0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 599928K/970752K available (11456K kernel code, 1962K rwdata, 4144K rodata, 3776K init, 964K bss, 43144K reserved, 327680K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] ftrace: allocating 37889 entries in 149 pages
[    0.000000] ftrace: allocated 149 pages with 4 groups
[    0.000000] trace event string verifier disabled
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000] rcu:     RCU event tracing is enabled.
[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=4.
[    0.000000]  Trampoline variant of Tasks RCU enabled.
[    0.000000]  Rude variant of Tasks RCU enabled.
[    0.000000]  Tracing variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] Root IRQ handler: gic_handle_irq
[    0.000000] GIC: Using split EOI/Deactivate mode
[    0.000000] irq_brcmstb_l2: registered L2 intc (/soc/interrupt-controller@7ef00100, parent irq: 10)
[    0.000000] random: get_random_bytes called from start_kernel+0x510/0x6f8 with crng_init=1
[    0.000000] arch_timer: cp15 timer(s) running at 54.00MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0xc743ce346, max_idle_ns: 440795203123 ns
[    0.000001] sched_clock: 56 bits at 54MHz, resolution 18ns, wraps every 4398046511102ns
[    0.008323] Console: colour dummy device 80x25
[    0.012819] printk: console [tty1] enabled
[    0.016958] printk: bootconsole [pl11] disabled

> Signed-off-by: Daniel Brát <danek.brat@gmail.com>
> ---
>  arch/arm/dts/bcm2711-rpi-4.dts       |  8 +-------
>  arch/arm/dts/bcm2837-rpi-3.dts       |  2 ++
>  arch/arm/dts/rpi-use-pl011-uart.dtsi | 24 ++++++++++++++++++++++++
>  3 files changed, 27 insertions(+), 7 deletions(-)
>  create mode 100644 arch/arm/dts/rpi-use-pl011-uart.dtsi
> 
> diff --git a/arch/arm/dts/bcm2711-rpi-4.dts b/arch/arm/dts/bcm2711-rpi-4.dts
> index 3c0caa73f..e082ad868 100644
> --- a/arch/arm/dts/bcm2711-rpi-4.dts
> +++ b/arch/arm/dts/bcm2711-rpi-4.dts
> @@ -9,10 +9,4 @@
>  	status = "disabled";
>  };
>  
> -&uart1 {
> -	/* VPU core clock is reported at 200MHz, but needs to be 500Mhz
> -	 * for ns16550 driver to set correct baudrate. Until that's
> -	 * figured out, hardcode clock frequency to the expected value
> -	 */
> -	clock-frequency = <500000000>;
> -};
> +#include "rpi-use-pl011-uart.dtsi"
> diff --git a/arch/arm/dts/bcm2837-rpi-3.dts b/arch/arm/dts/bcm2837-rpi-3.dts
> index e82d518fa..6af9e9d7c 100644
> --- a/arch/arm/dts/bcm2837-rpi-3.dts
> +++ b/arch/arm/dts/bcm2837-rpi-3.dts
> @@ -7,3 +7,5 @@
>  &sdhci {
>  	status = "disabled";
>  };
> +
> +#include "rpi-use-pl011-uart.dtsi"
> diff --git a/arch/arm/dts/rpi-use-pl011-uart.dtsi b/arch/arm/dts/rpi-use-pl011-uart.dtsi
> new file mode 100644
> index 000000000..7c75b07f8
> --- /dev/null
> +++ b/arch/arm/dts/rpi-use-pl011-uart.dtsi
> @@ -0,0 +1,24 @@
> +/* https://www.raspberrypi.com/documentation/computers/configuration.html#primary-and-secondary-uart */
> +
> +/* Makes barebox use pl011 uart as primary */
> +
> +&uart1 {
> +        status = "disabled";
> +};
> +
> +&uart0 {
> +        pinctrl-names = "default";
> +        pinctrl-0 = <&uart0_gpio14>;
> +        status = "okay";
> +};
> +
> +/delete-node/ &bt;
> +
> +&{/aliases} {
> +        serial0 = &uart0;
> +        serial1 = &uart1;
> +};
> +
> +&{/chosen} {
> +        stdout-path = "/serial0:115200n8";
> +};


-- 
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^ permalink raw reply	[flat|nested] 2+ messages in thread

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