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* [PATCH 0/5] fixups for Designware EQOS MAC Rockchip support
@ 2021-06-09  8:55 Ahmad Fatoum
  2021-06-09  8:55 ` [PATCH 1/5] fixup! net: eqos: " Ahmad Fatoum
                   ` (4 more replies)
  0 siblings, 5 replies; 7+ messages in thread
From: Ahmad Fatoum @ 2021-06-09  8:55 UTC (permalink / raw)
  To: barebox; +Cc: sha

Hello Sascha,

Patches 2 & 3 would have followed along with the rk3399 port, but that
one isn't functional enough to test them on. Given that you are currently
porting for the rk3568, maybe you could test now the parts that apply to
the rk3568 as well and squash?

The other patches are issues I noticed along the way.

Thanks,
Ahmad Fatoum (5):
  fixup! net: eqos: Rockchip support
  fixup! net: eqos: Rockchip support
  fixup! net: eqos: Rockchip support
  fixup! net: eqos: Rockchip support
  fixup! net: eqos: Rockchip support

 drivers/net/designware_rockchip.c | 114 ++++++++++++++++++++----------
 1 file changed, 76 insertions(+), 38 deletions(-)

-- 
2.29.2


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 1/5] fixup! net: eqos: Rockchip support
  2021-06-09  8:55 [PATCH 0/5] fixups for Designware EQOS MAC Rockchip support Ahmad Fatoum
@ 2021-06-09  8:55 ` Ahmad Fatoum
  2021-06-09  8:55 ` [PATCH 2/5] " Ahmad Fatoum
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 7+ messages in thread
From: Ahmad Fatoum @ 2021-06-09  8:55 UTC (permalink / raw)
  To: barebox; +Cc: sha, Ahmad Fatoum

Align capitalization with other hex constants.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/net/designware_rockchip.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/designware_rockchip.c b/drivers/net/designware_rockchip.c
index 883c1d806d6f..79c514e73054 100644
--- a/drivers/net/designware_rockchip.c
+++ b/drivers/net/designware_rockchip.c
@@ -69,10 +69,10 @@ static inline struct eqos_rk_gmac *to_rk_gmac(struct eqos *eqos)
 #define GRF_BIT(nr)	(BIT(nr) | BIT((nr) + 16))
 #define GRF_CLR_BIT(nr)	(BIT((nr) + 16))
 
-#define RK3568_GRF_GMAC0_CON0		0X0380
-#define RK3568_GRF_GMAC0_CON1		0X0384
-#define RK3568_GRF_GMAC1_CON0		0X0388
-#define RK3568_GRF_GMAC1_CON1		0X038c
+#define RK3568_GRF_GMAC0_CON0		0x0380
+#define RK3568_GRF_GMAC0_CON1		0x0384
+#define RK3568_GRF_GMAC1_CON0		0x0388
+#define RK3568_GRF_GMAC1_CON1		0x038c
 
 /* RK3568_GRF_GMAC0_CON1 && RK3568_GRF_GMAC1_CON1 */
 #define RK3568_GMAC_PHY_INTF_SEL_RGMII	\
-- 
2.29.2


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 2/5] fixup! net: eqos: Rockchip support
  2021-06-09  8:55 [PATCH 0/5] fixups for Designware EQOS MAC Rockchip support Ahmad Fatoum
  2021-06-09  8:55 ` [PATCH 1/5] fixup! net: eqos: " Ahmad Fatoum
@ 2021-06-09  8:55 ` Ahmad Fatoum
  2021-06-09 11:33   ` Sascha Hauer
  2021-06-09  8:55 ` [PATCH 3/5] " Ahmad Fatoum
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 7+ messages in thread
From: Ahmad Fatoum @ 2021-06-09  8:55 UTC (permalink / raw)
  To: barebox; +Cc: sha, Ahmad Fatoum

The rk3568 requests some extra clocks, which aren't needed/available for
other SoCs, like the rk3399. To make the driver easier to extend, split
up the clk array into common clocks, needed by all variants and extra
clocks, which are per-variant. This will come in handy for extending
the driver later.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/net/designware_rockchip.c | 80 +++++++++++++++++++++----------
 1 file changed, 56 insertions(+), 24 deletions(-)

diff --git a/drivers/net/designware_rockchip.c b/drivers/net/designware_rockchip.c
index 79c514e73054..a4c7bfe925db 100644
--- a/drivers/net/designware_rockchip.c
+++ b/drivers/net/designware_rockchip.c
@@ -20,11 +20,14 @@ struct rk_gmac_ops {
 	void (*set_to_rmii)(struct eqos *eqos);
 	void (*set_speed)(struct eqos *eqos, int speed);
 	void (*integrated_phy_powerup)(struct eqos *eqos);
+
+	const struct clk_bulk_data *extra_clks;
+	unsigned num_extra_clks;
 };
 
 struct eqos_rk_gmac {
-	struct clk_bulk_data *clks;
-	int num_clks;
+	struct clk_bulk_data *common_clks;
+	struct clk_bulk_data *extra_clks;
 	bool clock_input;
 	const struct rk_gmac_ops *ops;
 	struct regmap *grf;
@@ -41,9 +44,6 @@ enum {
 	CLK_MAC_REFOUT,
 	CLK_MAC_ACLK,
 	CLK_MAC_PCLK,
-	CLK_MAC_SPEED,
-	CLK_PTP_REF,
-	CLK_XPCS_PCLK,
 };
 
 static const struct clk_bulk_data rk_gmac_clks[] = {
@@ -53,9 +53,6 @@ static const struct clk_bulk_data rk_gmac_clks[] = {
 	[CLK_MAC_REFOUT]  = { .id = "clk_mac_refout" },
 	[CLK_MAC_ACLK]    = { .id = "aclk_mac" },
 	[CLK_MAC_PCLK]    = { .id = "pclk_mac" },
-	[CLK_MAC_SPEED]   = { .id = "clk_mac_speed" },
-	[CLK_PTP_REF]     = { .id = "ptp_ref" },
-	[CLK_XPCS_PCLK]   = { .id = "pclk_xpcs" },
 };
 
 static inline struct eqos_rk_gmac *to_rk_gmac(struct eqos *eqos)
@@ -94,7 +91,7 @@ static unsigned long eqos_get_csr_clk_rate_rk_gmac(struct eqos *eqos)
 {
 	struct eqos_rk_gmac *priv = to_rk_gmac(eqos);
 
-	return clk_get_rate(priv->clks[CLK_STMMACETH].clk);
+	return clk_get_rate(priv->common_clks[CLK_STMMACETH].clk);
 }
 
 static void rk3568_set_to_rgmii(struct eqos *eqos,
@@ -142,6 +139,18 @@ static void rk3568_set_to_rmii(struct eqos *eqos)
 		     RK3568_GMAC_PHY_INTF_SEL_RMII);
 }
 
+enum {
+	CLK_MAC_SPEED,
+	CLK_PTP_REF,
+	CLK_XPCS_PCLK,
+};
+
+static const struct clk_bulk_data rk3568_gmac_clks[] = {
+	[CLK_MAC_SPEED]   = { .id = "clk_mac_speed" },
+	[CLK_PTP_REF]     = { .id = "ptp_ref" },
+	[CLK_XPCS_PCLK]   = { .id = "pclk_xpcs" },
+};
+
 static void rk3568_set_gmac_speed(struct eqos *eqos, int speed)
 {
 	struct eqos_rk_gmac *priv = to_rk_gmac(eqos);
@@ -164,7 +173,7 @@ static void rk3568_set_gmac_speed(struct eqos *eqos, int speed)
 		return;
 	}
 
-	ret = clk_set_rate(priv->clks[CLK_MAC_SPEED].clk, rate);
+	ret = clk_set_rate(priv->extra_clks[CLK_MAC_SPEED].clk, rate);
 	if (ret)
 		dev_err(dev, "%s: set clk_mac_speed rate %ld failed %d\n",
 			__func__, rate, ret);
@@ -174,6 +183,9 @@ static const struct rk_gmac_ops rk3568_ops = {
 	.set_to_rgmii = rk3568_set_to_rgmii,
 	.set_to_rmii = rk3568_set_to_rmii,
 	.set_speed = rk3568_set_gmac_speed,
+
+	.extra_clks = rk3568_gmac_clks,
+	.num_extra_clks = ARRAY_SIZE(rk3568_gmac_clks),
 };
 
 static int rk_gmac_powerup(struct eqos *eqos)
@@ -221,6 +233,33 @@ static void eqos_rk_adjust_link(struct eth_device *edev)
 	eqos_adjust_link(edev);
 }
 
+static struct clk_bulk_data *eqos_rk_enable_clocks(struct device_d *dev,
+						   const struct clk_bulk_data *_clks,
+						   unsigned num_clks)
+{
+	struct clk_bulk_data *clks;
+	int ret;
+
+	if (!num_clks)
+		return NULL;
+
+	clks = xmemdup(_clks, num_clks * sizeof(*clks));
+
+	ret = clk_bulk_get(dev, num_clks, clks);
+	if (ret) {
+		dev_err(dev, "Failed to get common clks: %s\n", strerror(-ret));
+		return ERR_PTR(ret);
+	}
+
+	ret = clk_bulk_enable(num_clks, clks);
+	if (ret) {
+		dev_err(dev, "Failed to enable common clks: %s\n", strerror(-ret));
+		return ERR_PTR(ret);
+	}
+
+	return clks;
+}
+
 static int eqos_init_rk_gmac(struct device_d *dev, struct eqos *eqos)
 {
 	struct device_node *np = dev->device_node;
@@ -257,21 +296,14 @@ static int eqos_init_rk_gmac(struct device_d *dev, struct eqos *eqos)
 	priv->rx_delay = 0x10;
 	of_property_read_u32(np, "rx_delay", &priv->rx_delay);
 
-	priv->num_clks = ARRAY_SIZE(rk_gmac_clks);
-	priv->clks = xmalloc(priv->num_clks * sizeof(*priv->clks));
-	memcpy(priv->clks, rk_gmac_clks, sizeof rk_gmac_clks);
+	priv->common_clks = eqos_rk_enable_clocks(dev, rk_gmac_clks, ARRAY_SIZE(rk_gmac_clks));
+	if (IS_ERR(priv->common_clks))
+		return PTR_ERR(priv->common_clks);
 
-	ret = clk_bulk_get(dev, priv->num_clks, priv->clks);
-	if (ret) {
-		dev_err(dev, "Failed to get clks: %s\n", strerror(-ret));
-		return ret;
-	}
-
-	ret = clk_bulk_enable(priv->num_clks, priv->clks);
-	if (ret) {
-		dev_err(dev, "Failed to enable clks: %s\n", strerror(-ret));
-		return ret;
-	}
+	priv->extra_clks = eqos_rk_enable_clocks(dev, priv->ops->extra_clks,
+						 priv->ops->num_extra_clks);
+	if (IS_ERR(priv->extra_clks))
+		return PTR_ERR(priv->extra_clks);
 
 	rk_gmac_powerup(eqos);
 
-- 
2.29.2


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 3/5] fixup! net: eqos: Rockchip support
  2021-06-09  8:55 [PATCH 0/5] fixups for Designware EQOS MAC Rockchip support Ahmad Fatoum
  2021-06-09  8:55 ` [PATCH 1/5] fixup! net: eqos: " Ahmad Fatoum
  2021-06-09  8:55 ` [PATCH 2/5] " Ahmad Fatoum
@ 2021-06-09  8:55 ` Ahmad Fatoum
  2021-06-09  8:55 ` [PATCH 4/5] " Ahmad Fatoum
  2021-06-09  8:55 ` [PATCH 5/5] " Ahmad Fatoum
  4 siblings, 0 replies; 7+ messages in thread
From: Ahmad Fatoum @ 2021-06-09  8:55 UTC (permalink / raw)
  To: barebox; +Cc: sha, Ahmad Fatoum

Other network controllers have different clock settings when configuring
link speed for RMII vs. RGMII. Split up the callback like with Linux to
make future extension easier.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/net/designware_rockchip.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/net/designware_rockchip.c b/drivers/net/designware_rockchip.c
index a4c7bfe925db..09b53e2cc08d 100644
--- a/drivers/net/designware_rockchip.c
+++ b/drivers/net/designware_rockchip.c
@@ -18,7 +18,8 @@ struct rk_gmac_ops {
 	void (*set_to_rgmii)(struct eqos *eqos,
 			     int tx_delay, int rx_delay);
 	void (*set_to_rmii)(struct eqos *eqos);
-	void (*set_speed)(struct eqos *eqos, int speed);
+	void (*set_rmii_speed)(struct eqos *eqos, int speed);
+	void (*set_rgmii_speed)(struct eqos *eqos, int speed);
 	void (*integrated_phy_powerup)(struct eqos *eqos);
 
 	const struct clk_bulk_data *extra_clks;
@@ -182,7 +183,8 @@ static void rk3568_set_gmac_speed(struct eqos *eqos, int speed)
 static const struct rk_gmac_ops rk3568_ops = {
 	.set_to_rgmii = rk3568_set_to_rgmii,
 	.set_to_rmii = rk3568_set_to_rmii,
-	.set_speed = rk3568_set_gmac_speed,
+	.set_rmii_speed = rk3568_set_gmac_speed,
+	.set_rgmii_speed = rk3568_set_gmac_speed,
 
 	.extra_clks = rk3568_gmac_clks,
 	.num_extra_clks = ARRAY_SIZE(rk3568_gmac_clks),
@@ -228,7 +230,10 @@ static void eqos_rk_adjust_link(struct eth_device *edev)
 	struct eqos *eqos = edev->priv;
 	struct eqos_rk_gmac *priv = to_rk_gmac(eqos);
 
-	priv->ops->set_speed(eqos, edev->phydev->speed);
+	if (phy_interface_mode_is_rgmii(eqos->interface))
+		priv->ops->set_rgmii_speed(eqos, edev->phydev->speed);
+	else
+		priv->ops->set_rmii_speed(eqos, edev->phydev->speed);
 
 	eqos_adjust_link(edev);
 }
-- 
2.29.2


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 4/5] fixup! net: eqos: Rockchip support
  2021-06-09  8:55 [PATCH 0/5] fixups for Designware EQOS MAC Rockchip support Ahmad Fatoum
                   ` (2 preceding siblings ...)
  2021-06-09  8:55 ` [PATCH 3/5] " Ahmad Fatoum
@ 2021-06-09  8:55 ` Ahmad Fatoum
  2021-06-09  8:55 ` [PATCH 5/5] " Ahmad Fatoum
  4 siblings, 0 replies; 7+ messages in thread
From: Ahmad Fatoum @ 2021-06-09  8:55 UTC (permalink / raw)
  To: barebox; +Cc: sha, Ahmad Fatoum

Network adapter needs to be halted on shutdown, thus define a remove
callback that triggers the halt.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/net/designware_rockchip.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/designware_rockchip.c b/drivers/net/designware_rockchip.c
index 09b53e2cc08d..fb37243f6993 100644
--- a/drivers/net/designware_rockchip.c
+++ b/drivers/net/designware_rockchip.c
@@ -343,6 +343,7 @@ static __maybe_unused struct of_device_id dwc_ether_compatible[] = {
 static struct driver_d dwc_ether_driver = {
 	.name = "designware_eqos",
 	.probe = dwc_ether_probe,
+	.remove = eqos_remove,
 	.of_compatible = DRV_OF_COMPAT(dwc_ether_compatible),
 };
 device_platform_driver(dwc_ether_driver);
-- 
2.29.2


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 5/5] fixup! net: eqos: Rockchip support
  2021-06-09  8:55 [PATCH 0/5] fixups for Designware EQOS MAC Rockchip support Ahmad Fatoum
                   ` (3 preceding siblings ...)
  2021-06-09  8:55 ` [PATCH 4/5] " Ahmad Fatoum
@ 2021-06-09  8:55 ` Ahmad Fatoum
  4 siblings, 0 replies; 7+ messages in thread
From: Ahmad Fatoum @ 2021-06-09  8:55 UTC (permalink / raw)
  To: barebox; +Cc: sha, Ahmad Fatoum

Make drvinfo/debug initcalls more useful by using names featuring the
driver's variant.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/net/designware_rockchip.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/designware_rockchip.c b/drivers/net/designware_rockchip.c
index fb37243f6993..413b12739aa7 100644
--- a/drivers/net/designware_rockchip.c
+++ b/drivers/net/designware_rockchip.c
@@ -326,12 +326,12 @@ static struct eqos_ops rk_gmac_ops = {
 	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV,
 };
 
-static int dwc_ether_probe(struct device_d *dev)
+static int rk_gmac_probe(struct device_d *dev)
 {
 	return eqos_probe(dev, &rk_gmac_ops, xzalloc(sizeof(struct eqos_rk_gmac)));
 }
 
-static __maybe_unused struct of_device_id dwc_ether_compatible[] = {
+static __maybe_unused struct of_device_id rk_gmac_compatible[] = {
 	{
 		.compatible = "rockchip,rk3568-gmac",
 		.data = &rk3568_ops,
@@ -340,10 +340,10 @@ static __maybe_unused struct of_device_id dwc_ether_compatible[] = {
 	}
 };
 
-static struct driver_d dwc_ether_driver = {
-	.name = "designware_eqos",
-	.probe = dwc_ether_probe,
+static struct driver_d rk_gmac_driver = {
+	.name = "eqos-rockchip",
+	.probe = rk_gmac_probe,
 	.remove = eqos_remove,
-	.of_compatible = DRV_OF_COMPAT(dwc_ether_compatible),
+	.of_compatible = DRV_OF_COMPAT(rk_gmac_compatible),
 };
-device_platform_driver(dwc_ether_driver);
+device_platform_driver(rk_gmac_driver);
-- 
2.29.2


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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 2/5] fixup! net: eqos: Rockchip support
  2021-06-09  8:55 ` [PATCH 2/5] " Ahmad Fatoum
@ 2021-06-09 11:33   ` Sascha Hauer
  0 siblings, 0 replies; 7+ messages in thread
From: Sascha Hauer @ 2021-06-09 11:33 UTC (permalink / raw)
  To: Ahmad Fatoum; +Cc: barebox

On Wed, Jun 09, 2021 at 10:55:09AM +0200, Ahmad Fatoum wrote:
> The rk3568 requests some extra clocks, which aren't needed/available for
> other SoCs, like the rk3399. To make the driver easier to extend, split
> up the clk array into common clocks, needed by all variants and extra
> clocks, which are per-variant. This will come in handy for extending
> the driver later.

Applied all except this one. We should rather implement a
clk_bulk_get_optional() (I just did this) and use it. Each variant can
then check if it has all required clocks.

Sascha

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
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^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2021-06-09 11:40 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-09  8:55 [PATCH 0/5] fixups for Designware EQOS MAC Rockchip support Ahmad Fatoum
2021-06-09  8:55 ` [PATCH 1/5] fixup! net: eqos: " Ahmad Fatoum
2021-06-09  8:55 ` [PATCH 2/5] " Ahmad Fatoum
2021-06-09 11:33   ` Sascha Hauer
2021-06-09  8:55 ` [PATCH 3/5] " Ahmad Fatoum
2021-06-09  8:55 ` [PATCH 4/5] " Ahmad Fatoum
2021-06-09  8:55 ` [PATCH 5/5] " Ahmad Fatoum

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