mail archive of the barebox mailing list
 help / color / mirror / Atom feed
From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 3/9] ARM: i.MX8MN: adapt early clock support
Date: Sun,  5 Sep 2021 15:51:16 +0200	[thread overview]
Message-ID: <20210905135122.7038-4-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20210905135122.7038-1-a.fatoum@pengutronix.de>

PBL runs fine when doing the same early clock setup as for the i.MX8MM:
i2c communication works, copying to DRAM works, but boot hangs in
barebox proper. Vendor patches for U-Boot configure SYS_PLL3 as 600MHz
for i.MX8MP and i.MX8MN. barebox i.MX8MP port evidently can do without,
but for i.MX8MN, reducing PLL frequency to 600MHz was required to boot.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/arm/mach-imx/imx8m.c                       | 16 +++++++++++++---
 arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h |  1 +
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m.c b/arch/arm/mach-imx/imx8m.c
index ac48e7aa0ab1..6b7cdac54145 100644
--- a/arch/arm/mach-imx/imx8m.c
+++ b/arch/arm/mach-imx/imx8m.c
@@ -181,7 +181,7 @@ int imx8mq_init(void)
 #define IMX8MM_CCM_ANALOG_SYS_PLL2_GEN_CTRL	0x104
 #define IMX8MM_CCM_ANALOG_SYS_PLL3_GEN_CTRL	0x114
 
-void imx8mm_early_clock_init(void)
+static void __imx8mm_early_clock_init(unsigned long pll3_freq) /* and later */
 {
 	void __iomem *ana = IOMEM(MX8M_ANATOP_BASE_ADDR);
 	void __iomem *ccm = IOMEM(MX8M_CCM_BASE_ADDR);
@@ -224,9 +224,9 @@ void imx8mm_early_clock_init(void)
 				   IMX8M_CCM_TARGET_ROOTn_MUX(3));
 	imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_GIC);
 
-	/* Configure SYS_PLL3 to 750MHz */
+	/* Configure SYS_PLL3 */
 	clk_pll1416x_early_set_rate(ana + IMX8MM_CCM_ANALOG_SYS_PLL3_GEN_CTRL,
-				    750000000UL, 25000000UL);
+				    pll3_freq, 25000000UL);
 
 	clrsetbits_le32(ccm + IMX8M_CCM_TARGET_ROOTn(IMX8M_ARM_A53_CLK_ROOT),
 			IMX8M_CCM_TARGET_ROOTn_MUX(7),
@@ -249,6 +249,16 @@ void imx8mm_early_clock_init(void)
 			FIELD_PREP(CCM_TARGET_ROOT0_DIV, 0));
 }
 
+void imx8mm_early_clock_init(void)
+{
+	__imx8mm_early_clock_init(750000000UL);
+}
+
+void imx8mn_early_clock_init(void)
+{
+	__imx8mm_early_clock_init(600000000UL);
+}
+
 #define KEEP_ALIVE			0x18
 #define VER_L				0x1c
 #define VER_H				0x20
diff --git a/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h
index 743ed6cda0d2..985391f31ac1 100644
--- a/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h
@@ -50,6 +50,7 @@
 
 void imx8m_early_setup_uart_clock(void);
 void imx8mm_early_clock_init(void);
+void imx8mn_early_clock_init(void);
 void imx8m_clock_set_target_val(int clock_id, u32 val);
 void imx8m_ccgr_clock_enable(int index);
 void imx8m_ccgr_clock_disable(int index);
-- 
2.30.2


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox


  parent reply	other threads:[~2021-09-05 13:53 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-05 13:51 [PATCH 0/9] ARM: i.MX8M: add nano support Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 1/9] ARM: i.MX: add i.MX8MN (Nano) SoC support boilerplate Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 2/9] clk: imx: add i.MX8MN (Nano) support Ahmad Fatoum
2021-09-05 13:51 ` Ahmad Fatoum [this message]
2021-09-05 13:51 ` [PATCH 4/9] ARM: i.MX: extend drivers for " Ahmad Fatoum
     [not found]   ` <CAMHeXxN_P3pVSAStL2Z=8La_ioGHNu2hw9qQyFYAJ1VNA8hiEQ@mail.gmail.com>
2021-09-08 19:01     ` Trent Piepho
2021-09-15 10:36       ` Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 5/9] ARM: i.MX8MM: correct unrecognized fracpll frequency Ahmad Fatoum
     [not found]   ` <CAMHeXxPV_5mzAH3gbpy4WrL16kSstkLhJvx-VUQqbmy9C1r6WQ@mail.gmail.com>
2021-09-08 19:00     ` Trent Piepho
2021-09-15 10:39       ` Ahmad Fatoum
2021-09-24  3:12         ` Trent Piepho
2021-09-05 13:51 ` [PATCH 6/9] ddr: imx8m: add i.MX8MN (Nano) support Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 7/9] ddr: imx8m: ddrphy_train: add DDR4 support Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 8/9] scripts: imx: add i.MX8MN support to imx-image Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 9/9] ARM: i.MX8MN: add i.MX8MN-EVK support Ahmad Fatoum

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210905135122.7038-4-a.fatoum@pengutronix.de \
    --to=a.fatoum@pengutronix.de \
    --cc=barebox@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox