From: Oleksij Rempel <o.rempel@pengutronix.de>
To: Trent Piepho <trent.piepho@igorinstitute.com>
Cc: Barebox List <barebox@lists.infradead.org>
Subject: Re: [PATCH v2 2/2] net: phy: micrel: sync init code for ksz80xx variants with the kernel driver
Date: Wed, 13 Oct 2021 13:19:51 +0200 [thread overview]
Message-ID: <20211013111951.GD17532@pengutronix.de> (raw)
In-Reply-To: <CAMHeXxPE0Y71XOLLmMfSiVVA1T51+z_Afi9Kzn3-9qX=hxKOFQ@mail.gmail.com>
On Wed, Oct 13, 2021 at 03:25:17AM -0700, Trent Piepho wrote:
> On Wed, Oct 13, 2021 at 2:43 AM Oleksij Rempel <o.rempel@pengutronix.de> wrote:
> >
> > Sync part of barebox micrel driver with the kernel v5.15-rc1.
> > This change will affect most of by barebox supported 100Mbit/ksz80xx PHY
> > variants and provide unified devicetree support for LED and clock configuration.
>
> I already added LED mode OF support to this driver.
Yes, it was partially incorrect. It attempted to write to not existing or not
documented register of PHY_ID_KS8737.
This is the reason why I prefer to share driver code base with kernel,
where possible.
> > drivers/net/phy/micrel.c | 249 +++++++++++++++++++++++++++++++++++----
> > 1 file changed, 228 insertions(+), 21 deletions(-)
>
> 227 added lines is a lot to do basically nothing not already done.
I'm not sure what is your point
> > #define KSZ8051_RMII_50MHZ_CLK BIT(7)
> > +#define KSZPHY_RMII_REF_CLK_SEL BIT(7)
>
> These are the same bit in the same register!
Thank you! I'll fix it.
Regards,
Oleksij
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next prev parent reply other threads:[~2021-10-13 12:41 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-13 7:53 [PATCH v2 1/2] include/phy: add driver_data to resume more of kernel code Oleksij Rempel
2021-10-13 7:53 ` [PATCH v2 2/2] net: phy: micrel: sync init code for ksz80xx variants with the kernel driver Oleksij Rempel
2021-10-13 10:25 ` Trent Piepho
2021-10-13 11:19 ` Oleksij Rempel [this message]
2021-10-14 20:32 ` Trent Piepho
2021-10-15 6:36 ` Oleksij Rempel
2021-10-15 7:11 ` Sascha Hauer
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