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* [PATCH 00/13] kvx arch update
@ 2022-01-14 16:51 Jules Maselbas
  2022-01-14 16:52 ` [PATCH 01/13] kvx: dma: Remove arch dma_map/unmap_single Jules Maselbas
                   ` (9 more replies)
  0 siblings, 10 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:51 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau, Jules Maselbas

This series has updates for the KVX architecture, with some fixes and
with the addition of kvx specific drivers for the otp-nvmem and socinfo.

With this series it is now possible to run barebox on qemu, however
our qemu port isn't upstreamed yet, it can still be compiled. To do
so you will need to check this git repo [1] and follow the build
instructions.

To compile barebox for the KVX architecture there is a pre-built
toolchain that can be downloaded here [2]

The following commands should build an run barebox on qemu:
$ PATH=<path/to/gcc-kalray-kvx-v4.7.0-cd2>/bin:$PATH ARCH=kvx make generic_defconfig all
$ qemu-system-kvx -m 1G -kernel barebox

[1] https://github.com/kalray/qemu-builder
[2] https://github.com/kalray/build-scripts/releases/tag/v4.7.0-cd2

---

Clement Leger (6):
  common: elf: add elf_load_binary
  kvx: enable FITIMAGE support
  nvmem: add kvx otp non volatile regbank support
  kvx: add kvx_sfr_field_val
  drivers: add soc hierarchy properly
  soc: add kvx_socinfo driver

Jules Maselbas (6):
  kvx: dma: Remove arch dma_map/unmap_single
  kvx: Move LINUX_BOOT_PARAM_MAGIC in asm/common.h
  kvx: Accept LINUX_BOOT_PARAM_MAGIC as a valid magic value
  clocksource: kvx: Register as postcore_platform_driver
  kvx: Update defconfig
  kvx: dts: Update k200.dts

Louis Morhet (1):
  watchdog: kvx: do not disable watchdog on probe

 arch/kvx/Kconfig                   |   1 +
 arch/kvx/configs/generic_defconfig |  32 +++
 arch/kvx/cpu/cpu.c                 |   2 +-
 arch/kvx/dts/k200.dts              | 426 +++++++++++++++++++++++++++--
 arch/kvx/include/asm/bootm.h       |  11 -
 arch/kvx/include/asm/common.h      |   3 +-
 arch/kvx/include/asm/sfr.h         |   4 +
 arch/kvx/lib/bootm.c               |  33 ++-
 arch/kvx/lib/dma-default.c         |  38 ---
 common/elf.c                       |  83 ++++--
 drivers/Kconfig                    |   2 +-
 drivers/clocksource/kvx_timer.c    |   2 +-
 drivers/nvmem/Kconfig              |   7 +
 drivers/nvmem/Makefile             |   3 +
 drivers/nvmem/kvx-otp-nv.c         |  99 +++++++
 drivers/soc/Kconfig                |   6 +
 drivers/soc/Makefile               |   1 +
 drivers/soc/kvx/Kconfig            |  10 +
 drivers/soc/kvx/Makefile           |   1 +
 drivers/soc/kvx/kvx_socinfo.c      | 141 ++++++++++
 drivers/watchdog/kvx_wdt.c         |   4 +-
 include/elf.h                      |   1 +
 22 files changed, 814 insertions(+), 96 deletions(-)
 delete mode 100644 arch/kvx/include/asm/bootm.h
 create mode 100644 drivers/nvmem/kvx-otp-nv.c
 create mode 100644 drivers/soc/Kconfig
 create mode 100644 drivers/soc/kvx/Kconfig
 create mode 100644 drivers/soc/kvx/Makefile
 create mode 100644 drivers/soc/kvx/kvx_socinfo.c

-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 01/13] kvx: dma: Remove arch dma_map/unmap_single
  2022-01-14 16:51 [PATCH 00/13] kvx arch update Jules Maselbas
@ 2022-01-14 16:52 ` Jules Maselbas
  2022-01-14 16:52 ` [PATCH 02/13] kvx: Move LINUX_BOOT_PARAM_MAGIC in asm/common.h Jules Maselbas
                   ` (8 subsequent siblings)
  9 siblings, 0 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:52 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau, Jules Maselbas

Since dma_map/unmap_single functions have been moved to common, barebox
doesn't compile for kvx anymore. The original functions were doing some
magic to support 32bits dma buffer addresses. The original behavior can
be replaced by a device-tree dma-range property.

Fixes: 3f975f810 ("dma: move dma_map/unmap_single from ARM to common code")
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 arch/kvx/lib/dma-default.c | 38 --------------------------------------
 1 file changed, 38 deletions(-)

diff --git a/arch/kvx/lib/dma-default.c b/arch/kvx/lib/dma-default.c
index 2a4144696c..c84a32954e 100644
--- a/arch/kvx/lib/dma-default.c
+++ b/arch/kvx/lib/dma-default.c
@@ -54,41 +54,3 @@ void dma_sync_single_for_cpu(dma_addr_t addr, size_t size,
 		BUG();
 	}
 }
-
-#define KVX_DDR_ALIAS_OFFSET \
-	(KVX_DDR_64BIT_RAM_WINDOW_BA - KVX_DDR_32BIT_RAM_WINDOW_BA)
-#define KVX_DDR_ALIAS_WINDOW \
-	(KVX_DDR_64BIT_RAM_WINDOW_BA + KVX_DDR_ALIAS_OFFSET)
-
-/* Local smem is aliased between 0 and 16MB */
-#define KVX_SMEM_LOCAL_ALIAS 0x1000000ULL
-
-dma_addr_t dma_map_single(struct device_d *dev, void *ptr, size_t size,
-			  enum dma_data_direction dir)
-{
-	uintptr_t addr = (uintptr_t) ptr;
-
-	dma_sync_single_for_device(addr, size, dir);
-
-	/* Local smem alias should never be used for dma */
-	if (addr < KVX_SMEM_LOCAL_ALIAS)
-		return addr + (1 + kvx_cluster_id()) * KVX_SMEM_LOCAL_ALIAS;
-
-	if (dev->dma_mask && addr <= dev->dma_mask)
-		return addr;
-
-	if (addr >= KVX_DDR_ALIAS_WINDOW)
-		return DMA_ERROR_CODE;
-
-	addr -= KVX_DDR_ALIAS_OFFSET;
-	if (dev->dma_mask && addr > dev->dma_mask)
-		return DMA_ERROR_CODE;
-
-	return addr;
-}
-
-void dma_unmap_single(struct device_d *dev, dma_addr_t addr, size_t size,
-		      enum dma_data_direction dir)
-{
-	dma_sync_single_for_cpu(addr, size, dir);
-}
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 02/13] kvx: Move LINUX_BOOT_PARAM_MAGIC in asm/common.h
  2022-01-14 16:51 [PATCH 00/13] kvx arch update Jules Maselbas
  2022-01-14 16:52 ` [PATCH 01/13] kvx: dma: Remove arch dma_map/unmap_single Jules Maselbas
@ 2022-01-14 16:52 ` Jules Maselbas
  2022-01-14 16:52 ` [PATCH 03/13] kvx: Accept LINUX_BOOT_PARAM_MAGIC as a valid magic value Jules Maselbas
                   ` (7 subsequent siblings)
  9 siblings, 0 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:52 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau, Jules Maselbas

Declare both defines FSBL_PARAM_MAGIC and LINUX_BOOT_PARAM_MAGIC in the
same header file, as they both have a very similar uses and value.

Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 arch/kvx/include/asm/bootm.h  | 11 -----------
 arch/kvx/include/asm/common.h |  3 ++-
 arch/kvx/lib/bootm.c          |  1 -
 3 files changed, 2 insertions(+), 13 deletions(-)
 delete mode 100644 arch/kvx/include/asm/bootm.h

diff --git a/arch/kvx/include/asm/bootm.h b/arch/kvx/include/asm/bootm.h
deleted file mode 100644
index 7ad7e2e878..0000000000
--- a/arch/kvx/include/asm/bootm.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2019 Kalray Inc.
- */
-
-#ifndef _ASM_KVX_BOOTM_H
-#define _ASM_KVX_BOOTM_H
-
-#define LINUX_BOOT_PARAM_MAGIC 0x31564752414E494CULL
-
-#endif /* _ASM_KVX_BOOTM_H */
diff --git a/arch/kvx/include/asm/common.h b/arch/kvx/include/asm/common.h
index a7e301e53a..754953962b 100644
--- a/arch/kvx/include/asm/common.h
+++ b/arch/kvx/include/asm/common.h
@@ -12,7 +12,8 @@
  * Magic value passed in r0 to indicate valid parameters from FSBL when booting
  * If $r0 contains this value, then $r1 contains dtb pointer.
  */
-#define FSBL_PARAM_MAGIC	0x31564752414C414BULL
+#define FSBL_PARAM_MAGIC	0x31564752414C414BULL /* KALARGV1 */
+#define LINUX_BOOT_PARAM_MAGIC	0x31564752414E494CULL /* LINARGV1 */
 
 extern char _exception_start;
 extern char __end;
diff --git a/arch/kvx/lib/bootm.c b/arch/kvx/lib/bootm.c
index 4d17e1846d..3e9772c458 100644
--- a/arch/kvx/lib/bootm.c
+++ b/arch/kvx/lib/bootm.c
@@ -17,7 +17,6 @@
 #include <linux/kernel.h>
 
 #include <asm/cache.h>
-#include <asm/bootm.h>
 
 typedef void __noreturn (*boot_func_entry)(unsigned long, void *);
 
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 03/13] kvx: Accept LINUX_BOOT_PARAM_MAGIC as a valid magic value
  2022-01-14 16:51 [PATCH 00/13] kvx arch update Jules Maselbas
  2022-01-14 16:52 ` [PATCH 01/13] kvx: dma: Remove arch dma_map/unmap_single Jules Maselbas
  2022-01-14 16:52 ` [PATCH 02/13] kvx: Move LINUX_BOOT_PARAM_MAGIC in asm/common.h Jules Maselbas
@ 2022-01-14 16:52 ` Jules Maselbas
  2022-01-14 16:52 ` [PATCH 04/13] common: elf: add elf_load_binary Jules Maselbas
                   ` (6 subsequent siblings)
  9 siblings, 0 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:52 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau, Jules Maselbas

Both defines FSBL_PARAM_MAGIC and LINUX_BOOT_PARAM_MAGIC have a similar
uses and yet have different values. Making barebox accept both as valid
magic boot param will make it possible to use qemu-system-kvx to boot a
barebox image as a normal kernel.

Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 arch/kvx/cpu/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/kvx/cpu/cpu.c b/arch/kvx/cpu/cpu.c
index 788d3194fe..4b0d4d2d96 100644
--- a/arch/kvx/cpu/cpu.c
+++ b/arch/kvx/cpu/cpu.c
@@ -16,7 +16,7 @@ void kvx_lowlevel_setup(unsigned long r0, void *dtb_ptr)
 {
 	uint64_t ev_val = (uint64_t) &_exception_start | EXCEPTION_STRIDE;
 
-	if (r0 == FSBL_PARAM_MAGIC) {
+	if (r0 == FSBL_PARAM_MAGIC || r0 == LINUX_BOOT_PARAM_MAGIC) {
 		boot_dtb = dtb_ptr;
 		pr_info("Using DTB provided by FSBL\n");
 	}
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 04/13] common: elf: add elf_load_binary
  2022-01-14 16:51 [PATCH 00/13] kvx arch update Jules Maselbas
                   ` (2 preceding siblings ...)
  2022-01-14 16:52 ` [PATCH 03/13] kvx: Accept LINUX_BOOT_PARAM_MAGIC as a valid magic value Jules Maselbas
@ 2022-01-14 16:52 ` Jules Maselbas
  2022-01-14 17:21   ` Clément Léger
  2022-01-14 16:52 ` [PATCH 05/13] kvx: enable FITIMAGE support Jules Maselbas
                   ` (5 subsequent siblings)
  9 siblings, 1 reply; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:52 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau,
	Clement Leger, Jules Maselbas

From: Clement Leger <cleger@kalray.eu>

In order to load elf from a binary buffer, add elf_load_binary. This
will be used by FIT support to allow loading an elf from FIT.

Signed-off-by: Clement Leger <cleger@kalray.eu>
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 common/elf.c  | 83 +++++++++++++++++++++++++++++++++++++--------------
 include/elf.h |  1 +
 2 files changed, 62 insertions(+), 22 deletions(-)

diff --git a/common/elf.c b/common/elf.c
index af22be37e6..f10fb77953 100644
--- a/common/elf.c
+++ b/common/elf.c
@@ -101,15 +101,17 @@ static int elf_section_cmp(void *priv, struct list_head *a, struct list_head *b)
 static int load_elf_to_memory(struct elf_image *elf)
 {
 	void *dst;
-	int ret, fd;
+	int ret, fd = -1;
 	u64 p_filesz, p_memsz, p_offset;
 	struct elf_section *r;
 	struct list_head *list = &elf->list;
 
-	fd = open(elf->filename, O_RDONLY);
-	if (fd < 0) {
-		pr_err("could not open: %s\n", errno_str());
-		return -errno;
+	if (elf->filename) {
+		fd = open(elf->filename, O_RDONLY);
+		if (fd < 0) {
+			pr_err("could not open: %s\n", errno_str());
+			return -errno;
+		}
 	}
 
 	list_for_each_entry(r, list, list) {
@@ -118,21 +120,26 @@ static int load_elf_to_memory(struct elf_image *elf)
 		p_memsz = elf_phdr_p_memsz(elf, r->phdr);
 		dst = (void *) (phys_addr_t) elf_phdr_p_paddr(elf, r->phdr);
 
-		ret = lseek(fd, p_offset, SEEK_SET);
-		if (ret == -1) {
-			pr_err("lseek at offset 0x%llx failed\n", p_offset);
-			close(fd);
-			return ret;
-		}
-
 		pr_debug("Loading phdr offset 0x%llx to 0x%p (%llu bytes)\n",
 			 p_offset, dst, p_filesz);
 
-		if (read_full(fd, dst, p_filesz) < 0) {
-			pr_err("could not read elf segment: %s\n",
-			       errno_str());
-			close(fd);
-			return -errno;
+		if (fd >= 0) {
+			ret = lseek(fd, p_offset, SEEK_SET);
+			if (ret == -1) {
+				pr_err("lseek at offset 0x%llx failed\n",
+				       p_offset);
+				close(fd);
+				return ret;
+			}
+
+			if (read_full(fd, dst, p_filesz) < 0) {
+				pr_err("could not read elf segment: %s\n",
+				       errno_str());
+				close(fd);
+				return -errno;
+			}
+		} else {
+			memcpy(dst, elf->hdr_buf + p_offset, p_filesz);
 		}
 
 		if (p_filesz < p_memsz)
@@ -202,6 +209,37 @@ static int elf_check_image(struct elf_image *elf, void *buf)
 	return 0;
 }
 
+static void elf_init_struct(struct elf_image *elf)
+{
+	INIT_LIST_HEAD(&elf->list);
+	elf->low_addr = (void *) (unsigned long) -1;
+	elf->high_addr = 0;
+	elf->filename = NULL;
+}
+
+struct elf_image *elf_open_binary(void *buf)
+{
+	int ret;
+	struct elf_image *elf;
+
+	elf = calloc(1, sizeof(*elf));
+	if (!elf)
+		return ERR_PTR(-ENOMEM);
+
+	elf_init_struct(elf);
+
+	elf->hdr_buf = buf;
+	ret = elf_check_image(elf, buf);
+	if (ret) {
+		free(elf);
+		return ERR_PTR(-EINVAL);
+	}
+
+	elf->entry = elf_hdr_e_entry(elf, elf->hdr_buf);
+
+	return elf;
+}
+
 static struct elf_image *elf_check_init(const char *filename)
 {
 	int ret, fd;
@@ -213,9 +251,7 @@ static struct elf_image *elf_check_init(const char *filename)
 	if (!elf)
 		return ERR_PTR(-ENOMEM);
 
-	INIT_LIST_HEAD(&elf->list);
-	elf->low_addr = (void *) (unsigned long) -1;
-	elf->high_addr = 0;
+	elf_init_struct(elf);
 
 	/* First pass is to read elf header only */
 	fd = open(filename, O_RDONLY);
@@ -299,7 +335,10 @@ void elf_close(struct elf_image *elf)
 {
 	elf_release_regions(elf);
 
-	free(elf->hdr_buf);
-	free(elf->filename);
+	if (elf->filename) {
+		free(elf->hdr_buf);
+		free(elf->filename);
+	}
+
 	free(elf);
 }
diff --git a/include/elf.h b/include/elf.h
index 7970fd2c95..12673e93ed 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -414,6 +414,7 @@ static inline size_t elf_get_mem_size(struct elf_image *elf)
 	return elf->high_addr - elf->low_addr;
 }
 
+struct elf_image *elf_open_binary(void *buf);
 struct elf_image *elf_open(const char *filename);
 void elf_close(struct elf_image *elf);
 int elf_load(struct elf_image *elf);
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 05/13] kvx: enable FITIMAGE support
  2022-01-14 16:51 [PATCH 00/13] kvx arch update Jules Maselbas
                   ` (3 preceding siblings ...)
  2022-01-14 16:52 ` [PATCH 04/13] common: elf: add elf_load_binary Jules Maselbas
@ 2022-01-14 16:52 ` Jules Maselbas
  2022-01-14 16:52 ` [PATCH 06/13] clocksource: kvx: Register as postcore_platform_driver Jules Maselbas
                   ` (4 subsequent siblings)
  9 siblings, 0 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:52 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau,
	Clement Leger, Jules Maselbas

From: Clement Leger <cleger@kalray.eu>

Enable FITIMAGE support in kvx defconfig and add code to handle fit boot
from bootm command. This is rather a simple addition and it allow to boot
a fit image containing an ELF file as the kernel.

Signed-off-by: Clement Leger <cleger@kalray.eu>
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 arch/kvx/Kconfig     |  1 +
 arch/kvx/lib/bootm.c | 32 +++++++++++++++++++++++++++++++-
 2 files changed, 32 insertions(+), 1 deletion(-)

diff --git a/arch/kvx/Kconfig b/arch/kvx/Kconfig
index 0934440880..100a945761 100644
--- a/arch/kvx/Kconfig
+++ b/arch/kvx/Kconfig
@@ -10,6 +10,7 @@ config KVX
 	select COMMON_CLK_OF_PROVIDER
 	select ELF
 	select FLEXIBLE_BOOTARGS
+	select FITIMAGE
 	select GENERIC_FIND_NEXT_BIT
 	select HAS_ARCH_SJLJ
 	select HAS_CACHE
diff --git a/arch/kvx/lib/bootm.c b/arch/kvx/lib/bootm.c
index 3e9772c458..4c77f676ec 100644
--- a/arch/kvx/lib/bootm.c
+++ b/arch/kvx/lib/bootm.c
@@ -94,7 +94,7 @@ static int do_boot_elf(struct image_data *data, struct elf_image *elf)
 		goto err_free_fdt;
 	}
 
-	entry = (boot_func_entry) data->os_address;
+	entry = (boot_func_entry) elf->entry;
 
 	ret = do_boot_entry(data, entry, fdt);
 
@@ -104,6 +104,27 @@ err_free_fdt:
 	return ret;
 }
 
+static int do_bootm_fit(struct image_data *data)
+{
+	int ret;
+	struct elf_image *elf;
+
+	elf = elf_open_binary((void *) data->fit_kernel);
+	if (IS_ERR(elf))
+		return PTR_ERR(data->elf);
+
+	ret = elf_load(elf);
+	if (ret)
+		goto close_elf;
+
+	ret = do_boot_elf(data, elf);
+
+close_elf:
+	elf_close(elf);
+
+	return ret;
+}
+
 static int do_bootm_elf(struct image_data *data)
 {
 	int ret;
@@ -121,6 +142,12 @@ static struct image_handler elf_handler = {
 	.filetype = filetype_elf,
 };
 
+static struct image_handler fit_handler = {
+	.name = "FIT",
+	.bootm = do_bootm_fit,
+	.filetype = filetype_oftree,
+};
+
 static struct binfmt_hook binfmt_elf_hook = {
 	.type = filetype_elf,
 	.exec = "bootm",
@@ -130,6 +157,9 @@ static int kvx_register_image_handler(void)
 {
 	register_image_handler(&elf_handler);
 
+	if (IS_ENABLED(CONFIG_FITIMAGE))
+		register_image_handler(&fit_handler);
+
 	binfmt_register(&binfmt_elf_hook);
 
 	return 0;
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 06/13] clocksource: kvx: Register as postcore_platform_driver
  2022-01-14 16:51 [PATCH 00/13] kvx arch update Jules Maselbas
                   ` (4 preceding siblings ...)
  2022-01-14 16:52 ` [PATCH 05/13] kvx: enable FITIMAGE support Jules Maselbas
@ 2022-01-14 16:52 ` Jules Maselbas
  2022-01-14 16:52 ` [PATCH 07/13] watchdog: kvx: do not disable watchdog on probe Jules Maselbas
                   ` (3 subsequent siblings)
  9 siblings, 0 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:52 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau, Jules Maselbas

Register the kvx clocksource driver sooner, before probing other device
drivers by using the postcore_platform_driver macro. That way the other
drivers will have a correct timestamp when printing messages.

Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 drivers/clocksource/kvx_timer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clocksource/kvx_timer.c b/drivers/clocksource/kvx_timer.c
index 4125ddbee0..2a05d8deed 100644
--- a/drivers/clocksource/kvx_timer.c
+++ b/drivers/clocksource/kvx_timer.c
@@ -55,4 +55,4 @@ static struct driver_d kvx_timer_driver = {
 	.of_compatible = DRV_OF_COMPAT(kvx_timer_dt_ids),
 };
 
-device_platform_driver(kvx_timer_driver);
+postcore_platform_driver(kvx_timer_driver);
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 07/13] watchdog: kvx: do not disable watchdog on probe
  2022-01-14 16:51 [PATCH 00/13] kvx arch update Jules Maselbas
                   ` (5 preceding siblings ...)
  2022-01-14 16:52 ` [PATCH 06/13] clocksource: kvx: Register as postcore_platform_driver Jules Maselbas
@ 2022-01-14 16:52 ` Jules Maselbas
  2022-01-14 16:52 ` [PATCH 08/13] nvmem: add kvx otp non volatile regbank support Jules Maselbas
                   ` (2 subsequent siblings)
  9 siblings, 0 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:52 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau, Jules Maselbas

From: Louis Morhet <lmorhet@kalray.eu>

As the watchdog may be set by a lower stage in the boot chain, and for
a good reason (precisely to ensure reliable update when something
unexpected happens during the boot chain), it is a bad idea to always
disable it during probe.

We should either have a mechanism to refresh it on a regular basis in
barebox itself and set it to something bigger for Linux, or handle it
transparently and let the previous stage set the global watchdog up to
Linux. This patch assumes for now the latter.

Signed-off-by: Louis Morhet <lmorhet@kalray.eu>
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 drivers/watchdog/kvx_wdt.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/watchdog/kvx_wdt.c b/drivers/watchdog/kvx_wdt.c
index da19136fda..df9430769b 100644
--- a/drivers/watchdog/kvx_wdt.c
+++ b/drivers/watchdog/kvx_wdt.c
@@ -73,11 +73,9 @@ static int kvx_wdt_drv_probe(struct device_d *dev)
 	wdd->hwdev = dev;
 	wdd->set_timeout = kvx_wdt_set_timeout;
 
-	/* Be sure that interrupt are disable */
+	/* Be sure that interrupt are disabled */
 	kvx_sfr_set_field(TCR, WIE, 0);
 
-	kvx_watchdog_disable();
-
 	return watchdog_register(wdd);
 }
 
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 08/13] nvmem: add kvx otp non volatile regbank support
  2022-01-14 16:51 [PATCH 00/13] kvx arch update Jules Maselbas
                   ` (6 preceding siblings ...)
  2022-01-14 16:52 ` [PATCH 07/13] watchdog: kvx: do not disable watchdog on probe Jules Maselbas
@ 2022-01-14 16:52 ` Jules Maselbas
  2022-01-17  8:24   ` Sascha Hauer
  2022-01-14 16:52 ` [PATCH 09/13] kvx: add kvx_sfr_field_val Jules Maselbas
  2022-01-14 16:54 ` [PATCH 10/13] drivers: add soc hierarchy properly Jules Maselbas
  9 siblings, 1 reply; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:52 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau,
	Clement Leger, Jules Maselbas

From: Clement Leger <cleger@kalray.eu>

Backport Linux driver to barebox to access nvmem.

Signed-off-by: Clement Leger <cleger@kalray.eu>
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 drivers/nvmem/Kconfig      |  7 +++
 drivers/nvmem/Makefile     |  3 ++
 drivers/nvmem/kvx-otp-nv.c | 99 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 109 insertions(+)
 create mode 100644 drivers/nvmem/kvx-otp-nv.c

diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
index 07320101b8..3624cc64b6 100644
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -66,6 +66,13 @@ config STM32_BSEC
 	  This adds support for the STM32 OTP controller. Reads and writes
 	  to will go to the shadow RAM, not the OTP fuses themselvers.
 
+config KVX_OTP_NV
+	tristate "kalray KVX OTP Non volatile regs Support"
+	depends on KVX
+	help
+	  This is a simple driver to dump specified values of KVX OTP non
+	  volatile regs.
+
 config STARFIVE_OTP
 	tristate "Starfive OTP Supprot"
 	depends on SOC_STARFIVE
diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
index cd970aaea1..81629ddb27 100644
--- a/drivers/nvmem/Makefile
+++ b/drivers/nvmem/Makefile
@@ -24,4 +24,7 @@ nvmem_eeprom_93xx46-y		:= eeprom_93xx46.o
 obj-$(CONFIG_STM32_BSEC)	+= nvmem_bsec.o
 nvmem_bsec-y			:= bsec.o
 
+obj-$(CONFIG_KVX_OTP_NV)	+= nvmem-kvx-otp-nv.o
+nvmem-kvx-otp-nv-y		:= kvx-otp-nv.o
+
 obj-$(CONFIG_STARFIVE_OTP)	+= starfive-otp.o
diff --git a/drivers/nvmem/kvx-otp-nv.c b/drivers/nvmem/kvx-otp-nv.c
new file mode 100644
index 0000000000..f997f8a63b
--- /dev/null
+++ b/drivers/nvmem/kvx-otp-nv.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2020 Kalray Inc., Clément Léger
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <malloc.h>
+#include <xfuncs.h>
+#include <errno.h>
+#include <init.h>
+#include <net.h>
+#include <io.h>
+
+#include <linux/nvmem-provider.h>
+
+#define OTP_NV_ALIGN		4
+#define OTP_NV_ALIGN_MASK	(OTP_NV_ALIGN - 1)
+
+struct kvx_otp_nv_priv {
+	void __iomem *base;
+};
+
+static int kvx_otp_nv_read(void *context, unsigned int offset,
+			  void *_val, size_t bytes)
+{
+	struct kvx_otp_nv_priv *priv = context;
+	u8 *val = _val;
+	u32 tmp, copy_size;
+	u8 skip = offset & OTP_NV_ALIGN_MASK;
+
+	offset &= ~OTP_NV_ALIGN_MASK;
+
+	while (bytes) {
+		tmp = readl(priv->base + offset);
+		if (skip != 0)
+			copy_size = min(OTP_NV_ALIGN - skip, (int) bytes);
+		else
+			copy_size = min(bytes, sizeof(tmp));
+
+		memcpy(val, ((u8 *) &tmp) + skip, copy_size);
+		if (skip != 0)
+			skip = 0;
+
+		bytes -= copy_size;
+		val += copy_size;
+		offset += OTP_NV_ALIGN;
+	}
+
+	return 0;
+}
+
+static const struct nvmem_bus kvx_otp_nv_bus = {
+	.read = kvx_otp_nv_read,
+};
+
+static const struct of_device_id kvx_otp_nv_match[] = {
+	{ .compatible = "kalray,kvx-otp-nv" },
+	{ /* sentinel */},
+};
+
+static int kvx_otp_nv_probe(struct device_d *dev)
+{
+	struct resource *res;
+	struct nvmem_device *nvmem;
+	struct nvmem_config econfig = { 0 };
+	struct kvx_otp_nv_priv *priv;
+
+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	res = dev_request_mem_resource(dev, 0);
+	if (IS_ERR(res))
+		return PTR_ERR(res);
+
+	priv->base = IOMEM(res->start);
+
+	econfig.name = "kvx-nv-regbank";
+	econfig.stride = 1;
+	econfig.word_size = 1;
+	econfig.size = resource_size(res);
+	econfig.dev = dev;
+	econfig.priv = priv;
+	econfig.bus = &kvx_otp_nv_bus;
+
+	dev->priv = priv;
+
+	nvmem = nvmem_register(&econfig);
+
+	return PTR_ERR_OR_ZERO(nvmem);
+}
+
+static struct driver_d kvx_otp_nv_driver = {
+	.name	= "kvx-otp-nv",
+	.probe	= kvx_otp_nv_probe,
+	.of_compatible = DRV_OF_COMPAT(kvx_otp_nv_match),
+};
+postcore_platform_driver(kvx_otp_nv_driver);
-- 
2.17.1






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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 09/13] kvx: add kvx_sfr_field_val
  2022-01-14 16:51 [PATCH 00/13] kvx arch update Jules Maselbas
                   ` (7 preceding siblings ...)
  2022-01-14 16:52 ` [PATCH 08/13] nvmem: add kvx otp non volatile regbank support Jules Maselbas
@ 2022-01-14 16:52 ` Jules Maselbas
  2022-01-14 16:54 ` [PATCH 10/13] drivers: add soc hierarchy properly Jules Maselbas
  9 siblings, 0 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:52 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau,
	Clement Leger, Jules Maselbas

From: Clement Leger <cleger@kalray.eu>

Add this macro for upcoming socinfo driver. This extract a sfr field
using only its name.

Signed-off-by: Clement Leger <cleger@kalray.eu>
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 arch/kvx/include/asm/sfr.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/kvx/include/asm/sfr.h b/arch/kvx/include/asm/sfr.h
index 5b93cee345..89ff64bbdc 100644
--- a/arch/kvx/include/asm/sfr.h
+++ b/arch/kvx/include/asm/sfr.h
@@ -44,4 +44,8 @@ kvx_sfr_set_mask(unsigned char sfr, uint64_t mask, uint64_t value)
 #define kvx_sfr_set(_sfr, _val)	__builtin_kvx_set(KVX_SFR_ ## _sfr, _val)
 #define kvx_sfr_get(_sfr)	__builtin_kvx_get(KVX_SFR_ ## _sfr)
 
+#define kvx_sfr_field_val(_val, _sfr, _field) \
+			  (((_val) & KVX_SFR_ ## _sfr ## _ ## _field ## _MASK) \
+			  >> KVX_SFR_ ## _sfr ## _ ## _field ## _SHIFT)
+
 #endif	/* _ASM_KVX_SFR_DEFS_H */
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 10/13] drivers: add soc hierarchy properly
  2022-01-14 16:51 [PATCH 00/13] kvx arch update Jules Maselbas
                   ` (8 preceding siblings ...)
  2022-01-14 16:52 ` [PATCH 09/13] kvx: add kvx_sfr_field_val Jules Maselbas
@ 2022-01-14 16:54 ` Jules Maselbas
  2022-01-14 16:54   ` [PATCH 11/13] soc: add kvx_socinfo driver Jules Maselbas
                     ` (3 more replies)
  9 siblings, 4 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:54 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau,
	Clement Leger, Jules Maselbas

From: Clement Leger <cleger@kalray.eu>

We will add kvx driver in this folder to create a proper hierarchy.

Signed-off-by: Clement Leger <cleger@kalray.eu>
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 drivers/Kconfig     | 2 +-
 drivers/soc/Kconfig | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/Kconfig

diff --git a/drivers/Kconfig b/drivers/Kconfig
index dbdf3c06f5..d66714af9a 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -42,7 +42,7 @@ source "drivers/fpga/Kconfig"
 source "drivers/phy/Kconfig"
 source "drivers/crypto/Kconfig"
 source "drivers/memory/Kconfig"
-source "drivers/soc/imx/Kconfig"
+source "drivers/soc/Kconfig"
 source "drivers/nvme/Kconfig"
 source "drivers/ddr/Kconfig"
 source "drivers/power/Kconfig"
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
new file mode 100644
index 0000000000..d78f13f3f8
--- /dev/null
+++ b/drivers/soc/Kconfig
@@ -0,0 +1,5 @@
+menu "SoC drivers"
+
+source "drivers/soc/imx/Kconfig"
+
+endmenu
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 11/13] soc: add kvx_socinfo driver
  2022-01-14 16:54 ` [PATCH 10/13] drivers: add soc hierarchy properly Jules Maselbas
@ 2022-01-14 16:54   ` Jules Maselbas
  2022-01-14 16:54   ` [PATCH 12/13] kvx: Update defconfig Jules Maselbas
                     ` (2 subsequent siblings)
  3 siblings, 0 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:54 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau,
	Clement Leger, Jules Maselbas

From: Clement Leger <cleger@kalray.eu>

This driver uses various source (sfr, nvmem) to determine the mppa_id
and the architecture revision. These are then exported using global
variables which are:
- global.kvx.arch_rev: Architecture revision (kv3-1 for instance)
- global.kvx.mppa_id: Unique chip id, composed of lot and wafer id

Signed-off-by: Clement Leger <cleger@kalray.eu>
Co-developed-by: Jules Maselbas <jmaselbas@kalray.eu>
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 drivers/soc/Kconfig           |   1 +
 drivers/soc/Makefile          |   1 +
 drivers/soc/kvx/Kconfig       |  10 +++
 drivers/soc/kvx/Makefile      |   1 +
 drivers/soc/kvx/kvx_socinfo.c | 141 ++++++++++++++++++++++++++++++++++
 5 files changed, 154 insertions(+)
 create mode 100644 drivers/soc/kvx/Kconfig
 create mode 100644 drivers/soc/kvx/Makefile
 create mode 100644 drivers/soc/kvx/kvx_socinfo.c

diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index d78f13f3f8..54b69cc42e 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -1,5 +1,6 @@
 menu "SoC drivers"
 
 source "drivers/soc/imx/Kconfig"
+source "drivers/soc/kvx/Kconfig"
 
 endmenu
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index c3499c0c7f..3b75be8ae4 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -3,3 +3,4 @@
 obj-y	+= imx/
 obj-$(CONFIG_CPU_SIFIVE)	+= sifive/
 obj-$(CONFIG_SOC_STARFIVE)	+= starfive/
+obj-$(CONFIG_KVX)	+= kvx/
diff --git a/drivers/soc/kvx/Kconfig b/drivers/soc/kvx/Kconfig
new file mode 100644
index 0000000000..18dcb8ba14
--- /dev/null
+++ b/drivers/soc/kvx/Kconfig
@@ -0,0 +1,10 @@
+menu "KVX SoC drivers"
+
+config KVX_SOCINFO
+        bool "KVX SoC Info driver"
+	depends on KVX
+	select NVMEM
+	select KVX_OTP_NV
+	default y
+
+endmenu
diff --git a/drivers/soc/kvx/Makefile b/drivers/soc/kvx/Makefile
new file mode 100644
index 0000000000..cacfef21a1
--- /dev/null
+++ b/drivers/soc/kvx/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_KVX_SOCINFO) += kvx_socinfo.o
diff --git a/drivers/soc/kvx/kvx_socinfo.c b/drivers/soc/kvx/kvx_socinfo.c
new file mode 100644
index 0000000000..100faae766
--- /dev/null
+++ b/drivers/soc/kvx/kvx_socinfo.c
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2020 Kalray Inc., Clément Léger
+ */
+
+#define pr_fmt(fmt) "kvx_socinfo: " fmt
+
+#include <init.h>
+#include <driver.h>
+#include <globalvar.h>
+#include <magicvar.h>
+#include <command.h>
+#include <libfile.h>
+#include <getopt.h>
+#include <common.h>
+#include <fs.h>
+
+#include <asm/sfr.h>
+
+#include <linux/kernel.h>
+#include <linux/nvmem-consumer.h>
+
+#define LOT_ID_STR_LEN	8
+
+#define EWS_LOT_ID_MASK		0x1ffffffffffULL
+#define EWS_WAFER_ID_SHIFT	42
+#define EWS_WAFER_ID_MASK	0x1fULL
+
+#define FT_COM_AP_SHIFT		16
+#define FT_COM_AP_MASK		0x3f
+#define FT_DEVICE_ID_SHIFT	22
+#define FT_DEVICE_ID_MASK	0x1ff
+
+static char *kvx_mppa_id;
+static char *kvx_arch_rev;
+
+BAREBOX_MAGICVAR(kvx.arch_rev, "KVX architecture revision");
+BAREBOX_MAGICVAR(kvx.mppa_id, "KVX MPPA chip id");
+
+static void kvx_soc_info_read_revision(void)
+{
+	u64 pcr = kvx_sfr_get(PCR);
+	u8 sv = kvx_sfr_field_val(pcr, PCR, SV);
+	u8 car = kvx_sfr_field_val(pcr, PCR, CAR);
+	const char *car_str = "", *ver_str = "";
+
+	switch (car) {
+	case 0:
+		car_str = "kv3";
+		break;
+	}
+
+	switch (sv) {
+	case 0:
+		ver_str = "1";
+		break;
+	case 1:
+		ver_str = "2";
+		break;
+	}
+
+	kvx_arch_rev = basprintf("%s-%s", car_str, ver_str);
+
+	globalvar_add_simple_string("kvx.arch_rev", &kvx_arch_rev);
+}
+
+static int base38_decode(char *s, u64 val, int nb_char)
+{
+	int i;
+	const char *alphabet = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ_?";
+	const int base = strlen(alphabet);
+
+	if (s == NULL)
+		return -1;
+
+	for (i = 0; i < nb_char; i++) {
+		s[i] = alphabet[val % base];
+		val /= base;
+	}
+
+	return 0;
+}
+
+static int kvx_read_serial(struct device_node *socinfo)
+{
+	char lot_id[LOT_ID_STR_LEN + 1] = "";
+	char com_ap;
+	u64 *cell_val64;
+	u64 ews_val;
+	u32 *cell_val32;
+	u32 ft_val;
+	u8 wafer_id;
+	u16 device_id;
+
+	cell_val64 = (u64 *) nvmem_cell_get_and_read(socinfo, "ews_fuse", 8);
+	if (IS_ERR(cell_val64)) {
+		pr_debug("Fail to read ews_fuse\n");
+		return PTR_ERR(cell_val64);
+	}
+
+	ews_val = *cell_val64;
+	ews_val = (ews_val >> 32) | (ews_val << 32);
+	wafer_id = (ews_val >> EWS_WAFER_ID_SHIFT) & EWS_WAFER_ID_MASK;
+	base38_decode(lot_id, ews_val & EWS_LOT_ID_MASK, LOT_ID_STR_LEN);
+
+	cell_val32 = (u32 *) nvmem_cell_get_and_read(socinfo, "ft_fuse", 4);
+	if (IS_ERR(cell_val32)) {
+		pr_debug("Fail to read ft_fuse\n");
+		return PTR_ERR(cell_val32);
+	}
+
+	ft_val = *cell_val32;
+	device_id = (ft_val >> FT_DEVICE_ID_SHIFT) & FT_DEVICE_ID_MASK;
+	base38_decode(&com_ap, (ft_val >> FT_COM_AP_SHIFT) & FT_COM_AP_MASK, 1);
+
+	kvx_mppa_id = basprintf("%sA-%d%c-%03d", lot_id, wafer_id, com_ap,
+			       device_id);
+
+	globalvar_add_simple_string("kvx.mppa_id", &kvx_mppa_id);
+
+	return 0;
+}
+
+static int kvx_socinfo_probe(struct device_d *dev)
+{
+	kvx_soc_info_read_revision();
+
+	return kvx_read_serial(dev->device_node);
+}
+
+static const struct of_device_id kvx_socinfo_dt_ids[] = {
+	{ .compatible = "kalray,kvx-socinfo" },
+	{ }
+};
+
+static struct driver_d kvx_socinfo_driver = {
+	.name = "kvx-socinfo",
+	.probe = kvx_socinfo_probe,
+	.of_compatible = DRV_OF_COMPAT(kvx_socinfo_dt_ids),
+};
+coredevice_platform_driver(kvx_socinfo_driver);
-- 
2.17.1






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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 12/13] kvx: Update defconfig
  2022-01-14 16:54 ` [PATCH 10/13] drivers: add soc hierarchy properly Jules Maselbas
  2022-01-14 16:54   ` [PATCH 11/13] soc: add kvx_socinfo driver Jules Maselbas
@ 2022-01-14 16:54   ` Jules Maselbas
  2022-01-14 16:54   ` [PATCH 13/13] kvx: dts: Update k200.dts Jules Maselbas
  2022-01-14 17:06   ` [PATCH 10/13] drivers: add soc hierarchy properly Ahmad Fatoum
  3 siblings, 0 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:54 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau, Jules Maselbas

Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 arch/kvx/configs/generic_defconfig | 32 ++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/kvx/configs/generic_defconfig b/arch/kvx/configs/generic_defconfig
index 0d971ff3d5..0184ae0ed9 100644
--- a/arch/kvx/configs/generic_defconfig
+++ b/arch/kvx/configs/generic_defconfig
@@ -1,13 +1,45 @@
 CONFIG_AUTO_COMPLETE=y
 CONFIG_CONSOLE_RATP=y
+CONFIG_PARTITION_DISK_EFI=y
+CONFIG_STATE=y
+CONFIG_BOOTCHOOSER=y
+CONFIG_CMD_DMESG=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_BOOT=y
 CONFIG_CMD_RESET=y
+CONFIG_CMD_NV=y
+CONFIG_CMD_GLOBAL=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_CMP=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_USBGADGET=y
 CONFIG_CMD_WD=y
 CONFIG_CMD_OF_DUMP=y
+CONFIG_CMD_STATE=y
+CONFIG_DRIVER_SERIAL_KVX_SCALL=y
 CONFIG_DRIVER_SERIAL_NS16550=y
+CONFIG_MTD=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_SYNOPSYS_OCTALSPI_NOR=y
+CONFIG_USB_HOST=y
+CONFIG_USB_DWC2_HOST=y
+CONFIG_USB_DWC2_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DFU=y
+CONFIG_USB_GADGET_SERIAL=y
+CONFIG_MCI=y
+CONFIG_MCI_STARTUP=y
+CONFIG_MCI_DWC_MSHC=y
 CONFIG_CLOCKSOURCE_KVX=y
+CONFIG_STATE_DRV=y
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_KVX=y
+CONFIG_GPIO_DESIGNWARE=y
 CONFIG_PINCTRL_SINGLE=y
+CONFIG_GENERIC_PHY=y
+CONFIG_USB_NOP_XCEIV=y
+CONFIG_DIGEST_MD5_GENERIC=y
+CONFIG_DIGEST_SHA256_GENERIC=y
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH 13/13] kvx: dts: Update k200.dts
  2022-01-14 16:54 ` [PATCH 10/13] drivers: add soc hierarchy properly Jules Maselbas
  2022-01-14 16:54   ` [PATCH 11/13] soc: add kvx_socinfo driver Jules Maselbas
  2022-01-14 16:54   ` [PATCH 12/13] kvx: Update defconfig Jules Maselbas
@ 2022-01-14 16:54   ` Jules Maselbas
  2022-01-14 17:31     ` Clément Léger
  2022-01-14 17:06   ` [PATCH 10/13] drivers: add soc hierarchy properly Ahmad Fatoum
  3 siblings, 1 reply; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 16:54 UTC (permalink / raw)
  To: barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau, Jules Maselbas

Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 arch/kvx/dts/k200.dts | 426 ++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 410 insertions(+), 16 deletions(-)

diff --git a/arch/kvx/dts/k200.dts b/arch/kvx/dts/k200.dts
index d463ffda50..e83a08b462 100644
--- a/arch/kvx/dts/k200.dts
+++ b/arch/kvx/dts/k200.dts
@@ -3,6 +3,8 @@
  * Copyright (C) 2019 Kalray, Inc.
  */
 
+#include <dt-bindings/interrupt-controller/irq.h>
+
 /dts-v1/;
 
 / {
@@ -15,7 +17,7 @@
 	/* Standard nodes (choosen, cpus, memory, etc) */
 	chosen {
 		bootargs = "earlycon norandmaps console=ttyS0";
-		stdout-path = &serial0;
+		stdout-path = &uart0;
 	};
 
 	cpus {
@@ -46,6 +48,13 @@
 			/* 1 GHz clock */
 			clock-frequency = <1000000000>;
 		};
+
+		socp_clk: socp_clk@0 {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			/* 480 MHz clock */
+			clock-frequency = <480000000>;
+		};
 	};
 
 	ddr: memory@100000000 {
@@ -60,44 +69,147 @@
 		reg = <0x0 0x0 0x0 0x400000>;
 	};
 
+	core_intc: core_intc@0 {
+		compatible = "kalray,kvx-core-intc";
+		#address-cells = <0>;
+		#interrupt-cells = <1>;
+		interrupt-controller;
+	};
+
+	ipi_ctrl: ipi_ctrl@ad0000 {
+		compatible = "kalray,kvx-ipi-ctrl";
+		reg = <0x0 0xad0000 0x0 0x1000>;
+		interrupt-parent = <&core_intc>;
+		interrupts = <24>;
+	};
+
+	apic_gic: apic_gic@a20000 {
+		compatible = "kalray,kvx-apic-gic";
+		reg = <0x0 0xa20000 0x0 0x12000>;
+		#address-cells = <0>;
+		interrupt-parent = <&core_intc>;
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		interrupts = <4 5 6 7>;
+	};
+
+	apic_mailbox: apic_mailbox@a00000 {
+		compatible = "kalray,kvx-apic-mailbox";
+		reg = <0x0 0xa00000 0x0 0xea00>;
+		#address-cells = <0>;
+		interrupt-parent = <&apic_gic>;
+		interrupt-controller;
+		#interrupt-cells = <0>;
+		interrupts = <0 1 2 3 4 5 6 7 8 9
+			      10 11 12 13 14 15 16 17 18 19
+			      20 21 22 23 24 25 26 27 28 29
+			      30 31 32 33 34 35 36 37 38 39
+			      40 41 42 43 44 45 46 47 48 49
+			      50 51 52 53 54 55 56 57 58 59
+			      60 61 62 63 64 65 66 67 68 69
+			      70 71 72 73 74 75 76 77 78 79
+			      80 81 82 83 84 85 86 87 88 89
+			      90 91 92 93 94 95 96 97 98 99
+			      100 101 102 103 104 105 106 107 108 109
+			      110 111 112 113 114 115 116>;
+		msi-controller;
+	};
+
+	dame_handler {
+		/* Data Asynchronous Memory Error handler */
+		compatible = "kalray,kvx-dame-handler";
+		interrupt-parent = <&core_intc>;
+		interrupts = <16>;
+	};
+
 	core_timer {
 		compatible = "kalray,kvx-core-timer";
+		interrupts = <0>;
+		interrupt-parent = <&core_intc>;
 		clocks = <&core_clk>;
 	};
 
 	core_watchdog {
 		compatible = "kalray,kvx-core-watchdog";
+		interrupts = <2>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&core_clk>;
+	};
+
+	core_pm {
+		compatible = "kalray,kvx-core-pm";
+		interrupts = <3>;
+		interrupt-parent = <&core_intc>;
+		kalray,pm-num = <4>;
+	};
+
+	pwr_ctrl0: pwr_ctrl@a40000 {
+		reg = <0x0 0xa40000 0x0 0x4158>;
+		compatible = "kalray,kvx-pwr-ctrl";
+	};
+
+	power_off {
+		compatible = "kalray,kvx-scall-poweroff";
+	};
+
+	dsu_clock {
+		compatible = "kalray,kvx-dsu-clock";
+		reg = <0x0 0xa44180 0x0 0x8>;
 		clocks = <&core_clk>;
 	};
 
-	axi {
+	axi: axi {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
 
 		ranges;
+		dma-ranges;
+
+		iommu_soc_periph: iommu_soc_periph@27020000 {
+			compatible = "kalray,kvx-iommu";
+			reg = <0x0 0x27020000 0x0 0x00000240>,
+				<0x0 0x27020800 0x0 0x00000240>;
+			reg-names = "tx", "rx";
+			interrupts = <10 IRQ_TYPE_LEVEL_HIGH>, <0 IRQ_TYPE_LEVEL_HIGH>, <5 IRQ_TYPE_LEVEL_HIGH>,
+				     <25 IRQ_TYPE_LEVEL_HIGH>, <15 IRQ_TYPE_LEVEL_HIGH>, <20 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "rx_nomapping", "rx_protection", "rx_parity",
+					  "tx_nomapping", "tx_protection", "tx_parity";
+			interrupt-parent = <&itgen_soc_periph1>;
+			#iommu-cells = <1>;
+		};
+
+		itgen_soc_periph0: itgen_soc_periph0@27000000 {
+			compatible = "kalray,kvx-itgen";
+			reg = <0x0 0x27000000 0x0 0x1104>;
+			#address-cells = <0>;
+			msi-parent = <&apic_mailbox>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		itgen_soc_periph1: itgen_soc_periph1@27010000 {
+			compatible = "kalray,kvx-itgen";
+			reg = <0x0 0x27010000 0x0 0x1104>;
+			#address-cells = <0>;
+			msi-parent = <&apic_mailbox>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
 
 		ftu: ftu@10181000 {
 			compatible = "kalray,kvx-syscon", "syscon";
 			reg = <0x0 0x10181000 0x0 0x410>;
 		};
 
-		pmx_gpio0: pinmux@20230008 {
-			compatible = "pinctrl-single";
-			reg = <0x0 0x20230008 0x0 0x4>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			#pinctrl-cells = <2>;
-			pinctrl-single,bit-per-mux;
-			pinctrl-single,register-width = <32>;
-			pinctrl-single,function-mask = <0x1>;
-
-			uart0_pins: pinmux_uart0_pins {
-				pinctrl-single,bits = <0x00 0x00000003 0x00000003>;
-			};
+		reboot: reboot@0 {
+			compatible = "syscon-reboot";
+			regmap = <&ftu>;
+			offset = <0x50>;
+			value = <0x1>;
 		};
 
-		serial0: uart0@20210000 {
+		uart0: uart0@20210000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x0 0x20210000 0x0 0x100>;
 			clocks = <&ref_clk>;
@@ -105,6 +217,288 @@
 			reg-shift = <2>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&uart0_pins>;
+			interrupt-parent = <&itgen_soc_periph0>;
+			interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		uart1: uart1@20211000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x0 0x20211000 0x0 0x100>;
+			clocks = <&ref_clk>;
+			reg-io-width = <4>;
+			reg-shift = <2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart1_pins>;
+			interrupt-parent = <&itgen_soc_periph0>;
+			interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		uart2: uart2@20212000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x0 0x20212000 0x0 0x100>;
+			clocks = <&ref_clk>;
+			reg-io-width = <4>;
+			reg-shift = <2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart2_pins>;
+			interrupt-parent = <&itgen_soc_periph0>;
+			interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		uart3: uart3@20213000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x0 0x20213000 0x0 0x100>;
+			clocks = <&ref_clk>;
+			reg-io-width = <4>;
+			reg-shift = <2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart3_pins>;
+			interrupt-parent = <&itgen_soc_periph0>;
+			interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		uart4: uart4@20214000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x0 0x20214000 0x0 0x100>;
+			clocks = <&ref_clk>;
+			reg-io-width = <4>;
+			reg-shift = <2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart4_pins>;
+			interrupt-parent = <&itgen_soc_periph0>;
+			interrupts = <45 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		uart5: uart5@20215000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x0 0x20215000 0x0 0x100>;
+			clocks = <&ref_clk>;
+			reg-io-width = <4>;
+			reg-shift = <2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart5_pins>;
+			interrupt-parent = <&itgen_soc_periph0>;
+			interrupts = <46 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		timers0: timers0@20220000 {
+			compatible = "snps,dw-apb-timer";
+			reg = <0x0 0x20220000 0x0 0xD0>;
+			clocks = <&ref_clk>;
+		};
+
+		timers4: timers4@20224000 {
+			compatible = "snps,dw-apb-timer";
+			reg = <0x0 0x20224000 0x0 0xD0>;
+			clocks = <&ref_clk>;
+		};
+
+		otp_nv: otp_nv_regs@d20000 {
+			reg = <0x0 0xd20000 0x0 0xe0>;
+			compatible = "kalray,kvx-otp-nv";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ft_fuse: ft_fuse@cc {
+				reg = <0xcc 0x4>;
+			};
+			ews_fuse: ews_fuse@d8 {
+				reg = <0xd8 0x8>;
+			};
+		};
+
+		kvx_socinfo: kvx_socinfo@0 {
+			compatible = "kalray,kvx-socinfo";
+			nvmem-cells = <&ews_fuse>, <&ft_fuse>;
+			nvmem-cell-names = "ews_fuse", "ft_fuse";
+		};
+
+		ahb {
+			compatible = "simple-bus";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+			dma-ranges = <0x0 0x80000000 0x1 0x00000000 0x0 0x80000000>;
+
+			usb0: usb0@20080000 {
+				compatible = "kalray,kvx-hsotg", "snps,dwc2";
+				reg = <0x0 0x20080000 0x0 0x40000>;
+				clocks = <&socp_clk>;
+				clock-names = "otg";
+				dr_mode = "otg";
+				interrupt-parent = <&itgen_soc_periph0>;
+				interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+				g-rx-fifo-size = <2048>;
+				g-np-tx-fifo-size = <512>;
+				g-tx-fifo-size = <512 512 512 512 512 512 512 512>;
+				iommus = <&iommu_soc_periph 0x18>;
+			};
+
+			usb1: usb1@20100000 {
+				compatible = "kalray,kvx-hsotg", "snps,dwc2";
+				reg = <0x0 0x20100000 0x0 0x40000>;
+				clocks = <&socp_clk>;
+				clock-names = "otg";
+				dr_mode = "otg";
+				interrupt-parent = <&itgen_soc_periph0>;
+				interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
+				g-rx-fifo-size = <2048>;
+				g-np-tx-fifo-size = <512>;
+				g-tx-fifo-size = <512 512 512 512 512 512 512 512>;
+				iommus = <&iommu_soc_periph 0x28>;
+			};
+		};
+
+		apb {
+			compatible = "simple-bus";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+
+			gpio0: gpio@20230000 {
+				compatible = "snps,dw-apb-gpio";
+				reg = <0x0 0x20230000 0x0 0x1000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				gpio0_banka: gpio-controller@0 {
+					compatible = "snps,dw-apb-gpio-port";
+					#address-cells = <0>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					snps,nr-gpios = <32>;
+					snps,has-pinctrl;
+					reg = <0>;
+					interrupt-parent = <&itgen_soc_periph0>;
+					interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
+					/* All pins of port A are interrupt capable */
+					interrupt-controller;
+					#interrupt-cells = <2>;
+
+					uart0_pins: pinmux_uart0_pins {
+						function = "hw";
+						pins = "pin0", "pin1";
+					};
+					uart1_pins: pinmux_uart1_pins {
+						function = "hw";
+						pins = "pin2", "pin3";
+					};
+					uart2_pins: pinmux_uart2_pins {
+						function = "hw";
+						pins = "pin4", "pin5";
+					};
+					can0_pins: pinmux_can0_pins {
+						function = "hw";
+						pins = "pin6", "pin7";
+					};
+					can1_pins: pinmux_can1_pins {
+						function = "hw";
+						pins = "pin8", "pin9";
+					};
+					i2c0_pins: pinmux_i2c0_pins {
+						function = "hw";
+						pins = "pin10", "pin11";
+					};
+					smb1_pins: pinmux_smb1_pins {
+						function = "hw";
+						pins = "pin12", "pin13";
+					};
+					smb2_pins: pinmux_smb2_pins {
+						function = "hw";
+						pins = "pin14", "pin15";
+					};
+					qspi0_master_pins:pinmux_qspi0_master_pins {
+						function = "hw";
+						pins = "pin18", "pin19", "pin20", "pin21", "pin22", "pin23", "pin24";
+					};
+					spi_slave_pins:pinmux_spi_slave_pins {
+						function = "hw";
+						pins = "pin25", "pin26", "pin27", "pin28";
+					};
+					timer0_pins:pinmux_timer0_pins {
+						function = "hw";
+						pins = "pin29";
+					};
+					timer1_pins:pinmux_timer1_pins {
+						function = "hw";
+						pins = "pin30";
+					};
+					timer2_pins:pinmux_timer2_pins {
+						function = "hw";
+						pins = "pin31";
+					};
+				};
+			};
+
+			gpio1: gpio@20231000 {
+				compatible = "snps,dw-apb-gpio";
+				reg = <0x0 0x20231000 0x0 0x1000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				gpio1_banka: gpio-controller@0 {
+					compatible = "snps,dw-apb-gpio-port";
+					#address-cells = <0>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					snps,nr-gpios = <32>;
+					snps,has-pinctrl;
+					reg = <0>;
+					interrupt-parent = <&itgen_soc_periph0>;
+					interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
+					/* All pins of port A are interrupt capable */
+					interrupt-controller;
+					#interrupt-cells = <2>;
+
+					uart3_pins: pinmux_uart3_pins {
+						function = "hw";
+						pins = "pin0", "pin1";
+					};
+					uart4_pins: pinmux_uart4_pins {
+						function = "hw";
+						pins = "pin2", "pin3";
+					};
+					uart5_pins: pinmux_uart5_pins {
+						function = "hw";
+						pins = "pin4", "pin5";
+					};
+					can2_pins: pinmux_can2_pins {
+						function = "hw";
+						pins = "pin6", "pin7";
+					};
+					can3_pins: pinmux_can3_pins {
+						function = "hw";
+						pins = "pin8", "pin9";
+					};
+					i2c3_pins: pinmux_i2c3_pins {
+						function = "hw";
+						pins = "pin10", "pin11";
+					};
+					smb4_pins: pinmux_smb4_pins {
+						function = "hw";
+						pins = "pin12", "pin13";
+					};
+					timer3_pins:pinmux_timer3_pins {
+						function = "hw";
+						pins = "pin15";
+					};
+					timer4_pins:pinmux_timer4_pins {
+						function = "hw";
+						pins = "pin16";
+					};
+					timer5_pins:pinmux_timer5_pins {
+						function = "hw";
+						pins = "pin17";
+					};
+					qspi1_master_pins:pinmux_qspi1_master_pins {
+						function = "hw";
+						pins = "pin18", "pin19", "pin20", "pin21", "pin22", "pin23", "pin24";
+					};
+					qspi2_master_pins:pinmux_qspi2_master_pins {
+						function = "hw";
+						pins = "pin25", "pin26", "pin27", "pin28", "pin29", "pin30", "pin31";
+					};
+				};
+			};
 		};
 	};
 };
-- 
2.17.1


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 10/13] drivers: add soc hierarchy properly
  2022-01-14 16:54 ` [PATCH 10/13] drivers: add soc hierarchy properly Jules Maselbas
                     ` (2 preceding siblings ...)
  2022-01-14 16:54   ` [PATCH 13/13] kvx: dts: Update k200.dts Jules Maselbas
@ 2022-01-14 17:06   ` Ahmad Fatoum
  2022-01-14 17:11     ` Jules Maselbas
  3 siblings, 1 reply; 22+ messages in thread
From: Ahmad Fatoum @ 2022-01-14 17:06 UTC (permalink / raw)
  To: Jules Maselbas, barebox
  Cc: Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau, Clement Leger

Hello Jules,

On 14.01.22 17:54, Jules Maselbas wrote:
> From: Clement Leger <cleger@kalray.eu>
> 
> We will add kvx driver in this folder to create a proper hierarchy.

This won't apply cleanly. You need to rebase.

> 
> Signed-off-by: Clement Leger <cleger@kalray.eu>
> Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
> ---
>  drivers/Kconfig     | 2 +-
>  drivers/soc/Kconfig | 5 +++++
>  2 files changed, 6 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/soc/Kconfig
> 
> diff --git a/drivers/Kconfig b/drivers/Kconfig
> index dbdf3c06f5..d66714af9a 100644
> --- a/drivers/Kconfig
> +++ b/drivers/Kconfig
> @@ -42,7 +42,7 @@ source "drivers/fpga/Kconfig"
>  source "drivers/phy/Kconfig"
>  source "drivers/crypto/Kconfig"
>  source "drivers/memory/Kconfig"
> -source "drivers/soc/imx/Kconfig"
> +source "drivers/soc/Kconfig"
>  source "drivers/nvme/Kconfig"
>  source "drivers/ddr/Kconfig"
>  source "drivers/power/Kconfig"
> diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
> new file mode 100644
> index 0000000000..d78f13f3f8
> --- /dev/null
> +++ b/drivers/soc/Kconfig
> @@ -0,0 +1,5 @@
> +menu "SoC drivers"
> +
> +source "drivers/soc/imx/Kconfig"
> +
> +endmenu
> 


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^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 10/13] drivers: add soc hierarchy properly
  2022-01-14 17:06   ` [PATCH 10/13] drivers: add soc hierarchy properly Ahmad Fatoum
@ 2022-01-14 17:11     ` Jules Maselbas
  2022-01-14 17:20       ` Ahmad Fatoum
  0 siblings, 1 reply; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 17:11 UTC (permalink / raw)
  To: Ahmad Fatoum
  Cc: barebox, Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau,
	Clement Leger

On Fri, Jan 14, 2022 at 06:06:34PM +0100, Ahmad Fatoum wrote:
> Hello Jules,
> 
> On 14.01.22 17:54, Jules Maselbas wrote:
> > From: Clement Leger <cleger@kalray.eu>
> > 
> > We will add kvx driver in this folder to create a proper hierarchy.
> 
> This won't apply cleanly. You need to rebase.
On master ? Or should I wait for 2022.01.0 ?
> 
> > 
> > Signed-off-by: Clement Leger <cleger@kalray.eu>
> > Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
> > ---
> >  drivers/Kconfig     | 2 +-
> >  drivers/soc/Kconfig | 5 +++++
> >  2 files changed, 6 insertions(+), 1 deletion(-)
> >  create mode 100644 drivers/soc/Kconfig
> > 
> > diff --git a/drivers/Kconfig b/drivers/Kconfig
> > index dbdf3c06f5..d66714af9a 100644
> > --- a/drivers/Kconfig
> > +++ b/drivers/Kconfig
> > @@ -42,7 +42,7 @@ source "drivers/fpga/Kconfig"
> >  source "drivers/phy/Kconfig"
> >  source "drivers/crypto/Kconfig"
> >  source "drivers/memory/Kconfig"
> > -source "drivers/soc/imx/Kconfig"
> > +source "drivers/soc/Kconfig"
> >  source "drivers/nvme/Kconfig"
> >  source "drivers/ddr/Kconfig"
> >  source "drivers/power/Kconfig"
> > diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
> > new file mode 100644
> > index 0000000000..d78f13f3f8
> > --- /dev/null
> > +++ b/drivers/soc/Kconfig
> > @@ -0,0 +1,5 @@
> > +menu "SoC drivers"
> > +
> > +source "drivers/soc/imx/Kconfig"
> > +
> > +endmenu
> > 
> 
> 
> -- 
> Pengutronix e.K.                           |                             |
> Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
> 31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
> 
> 
> To declare a filtering error, please use the following link : https://www.security-mail.net/reporter.php?mid=9c47.61e1ad9d.ae4c.0&r=jmaselbas%40kalray.eu&s=a.fatoum%40pengutronix.de&o=Re%3A+%5BPATCH+10%2F13%5D+drivers%3A+add+soc+hierarchy+properly&verdict=C&c=835ed3aa69d359c0f8acda9912ca30b77899cc91
> 





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^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 10/13] drivers: add soc hierarchy properly
  2022-01-14 17:11     ` Jules Maselbas
@ 2022-01-14 17:20       ` Ahmad Fatoum
  0 siblings, 0 replies; 22+ messages in thread
From: Ahmad Fatoum @ 2022-01-14 17:20 UTC (permalink / raw)
  To: Jules Maselbas
  Cc: barebox, Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau,
	Clement Leger

On 14.01.22 18:11, Jules Maselbas wrote:
> On Fri, Jan 14, 2022 at 06:06:34PM +0100, Ahmad Fatoum wrote:
>> Hello Jules,
>>
>> On 14.01.22 17:54, Jules Maselbas wrote:
>>> From: Clement Leger <cleger@kalray.eu>
>>>
>>> We will add kvx driver in this folder to create a proper hierarchy.
>>
>> This won't apply cleanly. You need to rebase.

Sorry, my pattern matching was too eager. You only add
drivers/soc/Kconfig, not drivers/soc/Makefile. The latter
was added only recently.

> On master ? Or should I wait for 2022.01.0 ?

At release time, Sascha tags master and then merges
next into master. Then for a month patches are applied onto
next and only fixes are cherry-picked to master until next
release, so patches rebased on next are least likely to conflict.

Given that most arch/kvx stuff you touch wasn't updated
in the meantime, I guess you don't need to rebase.

Sorry for the confusion!

Cheers,
Ahmad

>>
>>>
>>> Signed-off-by: Clement Leger <cleger@kalray.eu>
>>> Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
>>> ---
>>>  drivers/Kconfig     | 2 +-
>>>  drivers/soc/Kconfig | 5 +++++
>>>  2 files changed, 6 insertions(+), 1 deletion(-)
>>>  create mode 100644 drivers/soc/Kconfig
>>>
>>> diff --git a/drivers/Kconfig b/drivers/Kconfig
>>> index dbdf3c06f5..d66714af9a 100644
>>> --- a/drivers/Kconfig
>>> +++ b/drivers/Kconfig
>>> @@ -42,7 +42,7 @@ source "drivers/fpga/Kconfig"
>>>  source "drivers/phy/Kconfig"
>>>  source "drivers/crypto/Kconfig"
>>>  source "drivers/memory/Kconfig"
>>> -source "drivers/soc/imx/Kconfig"
>>> +source "drivers/soc/Kconfig"
>>>  source "drivers/nvme/Kconfig"
>>>  source "drivers/ddr/Kconfig"
>>>  source "drivers/power/Kconfig"
>>> diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
>>> new file mode 100644
>>> index 0000000000..d78f13f3f8
>>> --- /dev/null
>>> +++ b/drivers/soc/Kconfig
>>> @@ -0,0 +1,5 @@
>>> +menu "SoC drivers"
>>> +
>>> +source "drivers/soc/imx/Kconfig"
>>> +
>>> +endmenu
>>>
>>
>>
>> -- 
>> Pengutronix e.K.                           |                             |
>> Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
>> 31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
>> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
>>
>>
>> To declare a filtering error, please use the following link : https://www.security-mail.net/reporter.php?mid=9c47.61e1ad9d.ae4c.0&r=jmaselbas%40kalray.eu&s=a.fatoum%40pengutronix.de&o=Re%3A+%5BPATCH+10%2F13%5D+drivers%3A+add+soc+hierarchy+properly&verdict=C&c=835ed3aa69d359c0f8acda9912ca30b77899cc91
>>
> 
> 
> 
> 
> 


-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 04/13] common: elf: add elf_load_binary
  2022-01-14 16:52 ` [PATCH 04/13] common: elf: add elf_load_binary Jules Maselbas
@ 2022-01-14 17:21   ` Clément Léger
  2022-01-14 17:24     ` Jules Maselbas
  0 siblings, 1 reply; 22+ messages in thread
From: Clément Léger @ 2022-01-14 17:21 UTC (permalink / raw)
  To: Jules Maselbas
  Cc: barebox, Louis Morhet, Luc Michel, Yann Sionneau, Clement Leger

Le Fri, 14 Jan 2022 17:52:03 +0100,
Jules Maselbas <jmaselbas@kalray.eu> a écrit :

> From: Clement Leger <cleger@kalray.eu>
> 
> In order to load elf from a binary buffer, add elf_load_binary. This
> will be used by FIT support to allow loading an elf from FIT.
> 
> Signed-off-by: Clement Leger <cleger@kalray.eu>

Hi Jules,

This is not my mail address anymore, could you update it with
clement.leger@bootlin.com ?

Thanks.

> Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
> ---
>  common/elf.c  | 83 +++++++++++++++++++++++++++++++++++++--------------
>  include/elf.h |  1 +
>  2 files changed, 62 insertions(+), 22 deletions(-)
> 
> diff --git a/common/elf.c b/common/elf.c
> index af22be37e6..f10fb77953 100644
> --- a/common/elf.c
> +++ b/common/elf.c
> @@ -101,15 +101,17 @@ static int elf_section_cmp(void *priv, struct list_head *a, struct list_head *b)
>  static int load_elf_to_memory(struct elf_image *elf)
>  {
>  	void *dst;
> -	int ret, fd;
> +	int ret, fd = -1;
>  	u64 p_filesz, p_memsz, p_offset;
>  	struct elf_section *r;
>  	struct list_head *list = &elf->list;
>  
> -	fd = open(elf->filename, O_RDONLY);
> -	if (fd < 0) {
> -		pr_err("could not open: %s\n", errno_str());
> -		return -errno;
> +	if (elf->filename) {
> +		fd = open(elf->filename, O_RDONLY);
> +		if (fd < 0) {
> +			pr_err("could not open: %s\n", errno_str());
> +			return -errno;
> +		}
>  	}
>  
>  	list_for_each_entry(r, list, list) {
> @@ -118,21 +120,26 @@ static int load_elf_to_memory(struct elf_image *elf)
>  		p_memsz = elf_phdr_p_memsz(elf, r->phdr);
>  		dst = (void *) (phys_addr_t) elf_phdr_p_paddr(elf, r->phdr);
>  
> -		ret = lseek(fd, p_offset, SEEK_SET);
> -		if (ret == -1) {
> -			pr_err("lseek at offset 0x%llx failed\n", p_offset);
> -			close(fd);
> -			return ret;
> -		}
> -
>  		pr_debug("Loading phdr offset 0x%llx to 0x%p (%llu bytes)\n",
>  			 p_offset, dst, p_filesz);
>  
> -		if (read_full(fd, dst, p_filesz) < 0) {
> -			pr_err("could not read elf segment: %s\n",
> -			       errno_str());
> -			close(fd);
> -			return -errno;
> +		if (fd >= 0) {
> +			ret = lseek(fd, p_offset, SEEK_SET);
> +			if (ret == -1) {
> +				pr_err("lseek at offset 0x%llx failed\n",
> +				       p_offset);
> +				close(fd);
> +				return ret;
> +			}
> +
> +			if (read_full(fd, dst, p_filesz) < 0) {
> +				pr_err("could not read elf segment: %s\n",
> +				       errno_str());
> +				close(fd);
> +				return -errno;
> +			}
> +		} else {
> +			memcpy(dst, elf->hdr_buf + p_offset, p_filesz);
>  		}
>  
>  		if (p_filesz < p_memsz)
> @@ -202,6 +209,37 @@ static int elf_check_image(struct elf_image *elf, void *buf)
>  	return 0;
>  }
>  
> +static void elf_init_struct(struct elf_image *elf)
> +{
> +	INIT_LIST_HEAD(&elf->list);
> +	elf->low_addr = (void *) (unsigned long) -1;
> +	elf->high_addr = 0;
> +	elf->filename = NULL;
> +}
> +
> +struct elf_image *elf_open_binary(void *buf)
> +{
> +	int ret;
> +	struct elf_image *elf;
> +
> +	elf = calloc(1, sizeof(*elf));
> +	if (!elf)
> +		return ERR_PTR(-ENOMEM);
> +
> +	elf_init_struct(elf);
> +
> +	elf->hdr_buf = buf;
> +	ret = elf_check_image(elf, buf);
> +	if (ret) {
> +		free(elf);
> +		return ERR_PTR(-EINVAL);
> +	}
> +
> +	elf->entry = elf_hdr_e_entry(elf, elf->hdr_buf);
> +
> +	return elf;
> +}
> +
>  static struct elf_image *elf_check_init(const char *filename)
>  {
>  	int ret, fd;
> @@ -213,9 +251,7 @@ static struct elf_image *elf_check_init(const char *filename)
>  	if (!elf)
>  		return ERR_PTR(-ENOMEM);
>  
> -	INIT_LIST_HEAD(&elf->list);
> -	elf->low_addr = (void *) (unsigned long) -1;
> -	elf->high_addr = 0;
> +	elf_init_struct(elf);
>  
>  	/* First pass is to read elf header only */
>  	fd = open(filename, O_RDONLY);
> @@ -299,7 +335,10 @@ void elf_close(struct elf_image *elf)
>  {
>  	elf_release_regions(elf);
>  
> -	free(elf->hdr_buf);
> -	free(elf->filename);
> +	if (elf->filename) {
> +		free(elf->hdr_buf);
> +		free(elf->filename);
> +	}
> +
>  	free(elf);
>  }
> diff --git a/include/elf.h b/include/elf.h
> index 7970fd2c95..12673e93ed 100644
> --- a/include/elf.h
> +++ b/include/elf.h
> @@ -414,6 +414,7 @@ static inline size_t elf_get_mem_size(struct elf_image *elf)
>  	return elf->high_addr - elf->low_addr;
>  }
>  
> +struct elf_image *elf_open_binary(void *buf);
>  struct elf_image *elf_open(const char *filename);
>  void elf_close(struct elf_image *elf);
>  int elf_load(struct elf_image *elf);



-- 
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com

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^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 04/13] common: elf: add elf_load_binary
  2022-01-14 17:21   ` Clément Léger
@ 2022-01-14 17:24     ` Jules Maselbas
  0 siblings, 0 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-14 17:24 UTC (permalink / raw)
  To: Clément Léger
  Cc: barebox, Louis Morhet, Luc Michel, Yann Sionneau, Clement Leger

On Fri, Jan 14, 2022 at 06:21:09PM +0100, Clément Léger wrote:
> Le Fri, 14 Jan 2022 17:52:03 +0100,
> Jules Maselbas <jmaselbas@kalray.eu> a écrit :
> 
> > From: Clement Leger <cleger@kalray.eu>
> > 
> > In order to load elf from a binary buffer, add elf_load_binary. This
> > will be used by FIT support to allow loading an elf from FIT.
> > 
> > Signed-off-by: Clement Leger <cleger@kalray.eu>
> 
> Hi Jules,
> 
> This is not my mail address anymore, could you update it with
> clement.leger@bootlin.com ?
Sure can, I wasn't sure which email I should have used. I'll send a v2.

> 
> Thanks.
> 
> > Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
> > ---
> >  common/elf.c  | 83 +++++++++++++++++++++++++++++++++++++--------------
> >  include/elf.h |  1 +
> >  2 files changed, 62 insertions(+), 22 deletions(-)
> > 
> > diff --git a/common/elf.c b/common/elf.c
> > index af22be37e6..f10fb77953 100644
> > --- a/common/elf.c
> > +++ b/common/elf.c
> > @@ -101,15 +101,17 @@ static int elf_section_cmp(void *priv, struct list_head *a, struct list_head *b)
> >  static int load_elf_to_memory(struct elf_image *elf)
> >  {
> >  	void *dst;
> > -	int ret, fd;
> > +	int ret, fd = -1;
> >  	u64 p_filesz, p_memsz, p_offset;
> >  	struct elf_section *r;
> >  	struct list_head *list = &elf->list;
> >  
> > -	fd = open(elf->filename, O_RDONLY);
> > -	if (fd < 0) {
> > -		pr_err("could not open: %s\n", errno_str());
> > -		return -errno;
> > +	if (elf->filename) {
> > +		fd = open(elf->filename, O_RDONLY);
> > +		if (fd < 0) {
> > +			pr_err("could not open: %s\n", errno_str());
> > +			return -errno;
> > +		}
> >  	}
> >  
> >  	list_for_each_entry(r, list, list) {
> > @@ -118,21 +120,26 @@ static int load_elf_to_memory(struct elf_image *elf)
> >  		p_memsz = elf_phdr_p_memsz(elf, r->phdr);
> >  		dst = (void *) (phys_addr_t) elf_phdr_p_paddr(elf, r->phdr);
> >  
> > -		ret = lseek(fd, p_offset, SEEK_SET);
> > -		if (ret == -1) {
> > -			pr_err("lseek at offset 0x%llx failed\n", p_offset);
> > -			close(fd);
> > -			return ret;
> > -		}
> > -
> >  		pr_debug("Loading phdr offset 0x%llx to 0x%p (%llu bytes)\n",
> >  			 p_offset, dst, p_filesz);
> >  
> > -		if (read_full(fd, dst, p_filesz) < 0) {
> > -			pr_err("could not read elf segment: %s\n",
> > -			       errno_str());
> > -			close(fd);
> > -			return -errno;
> > +		if (fd >= 0) {
> > +			ret = lseek(fd, p_offset, SEEK_SET);
> > +			if (ret == -1) {
> > +				pr_err("lseek at offset 0x%llx failed\n",
> > +				       p_offset);
> > +				close(fd);
> > +				return ret;
> > +			}
> > +
> > +			if (read_full(fd, dst, p_filesz) < 0) {
> > +				pr_err("could not read elf segment: %s\n",
> > +				       errno_str());
> > +				close(fd);
> > +				return -errno;
> > +			}
> > +		} else {
> > +			memcpy(dst, elf->hdr_buf + p_offset, p_filesz);
> >  		}
> >  
> >  		if (p_filesz < p_memsz)
> > @@ -202,6 +209,37 @@ static int elf_check_image(struct elf_image *elf, void *buf)
> >  	return 0;
> >  }
> >  
> > +static void elf_init_struct(struct elf_image *elf)
> > +{
> > +	INIT_LIST_HEAD(&elf->list);
> > +	elf->low_addr = (void *) (unsigned long) -1;
> > +	elf->high_addr = 0;
> > +	elf->filename = NULL;
> > +}
> > +
> > +struct elf_image *elf_open_binary(void *buf)
> > +{
> > +	int ret;
> > +	struct elf_image *elf;
> > +
> > +	elf = calloc(1, sizeof(*elf));
> > +	if (!elf)
> > +		return ERR_PTR(-ENOMEM);
> > +
> > +	elf_init_struct(elf);
> > +
> > +	elf->hdr_buf = buf;
> > +	ret = elf_check_image(elf, buf);
> > +	if (ret) {
> > +		free(elf);
> > +		return ERR_PTR(-EINVAL);
> > +	}
> > +
> > +	elf->entry = elf_hdr_e_entry(elf, elf->hdr_buf);
> > +
> > +	return elf;
> > +}
> > +
> >  static struct elf_image *elf_check_init(const char *filename)
> >  {
> >  	int ret, fd;
> > @@ -213,9 +251,7 @@ static struct elf_image *elf_check_init(const char *filename)
> >  	if (!elf)
> >  		return ERR_PTR(-ENOMEM);
> >  
> > -	INIT_LIST_HEAD(&elf->list);
> > -	elf->low_addr = (void *) (unsigned long) -1;
> > -	elf->high_addr = 0;
> > +	elf_init_struct(elf);
> >  
> >  	/* First pass is to read elf header only */
> >  	fd = open(filename, O_RDONLY);
> > @@ -299,7 +335,10 @@ void elf_close(struct elf_image *elf)
> >  {
> >  	elf_release_regions(elf);
> >  
> > -	free(elf->hdr_buf);
> > -	free(elf->filename);
> > +	if (elf->filename) {
> > +		free(elf->hdr_buf);
> > +		free(elf->filename);
> > +	}
> > +
> >  	free(elf);
> >  }
> > diff --git a/include/elf.h b/include/elf.h
> > index 7970fd2c95..12673e93ed 100644
> > --- a/include/elf.h
> > +++ b/include/elf.h
> > @@ -414,6 +414,7 @@ static inline size_t elf_get_mem_size(struct elf_image *elf)
> >  	return elf->high_addr - elf->low_addr;
> >  }
> >  
> > +struct elf_image *elf_open_binary(void *buf);
> >  struct elf_image *elf_open(const char *filename);
> >  void elf_close(struct elf_image *elf);
> >  int elf_load(struct elf_image *elf);
> 
> 
> 
> -- 
> Clément Léger,
> Embedded Linux and Kernel engineer at Bootlin
> https://bootlin.com
> 
> 
> To declare a filtering error, please use the following link : https://www.security-mail.net/reporter.php?mid=4ac2.61e1b140.5ccaa.0&r=jmaselbas%40kalray.eu&s=clement.leger%40bootlin.com&o=Re%3A+%5BPATCH+04%2F13%5D+common%3A+elf%3A+add+elf_load_binary&verdict=C&c=04c6694098bfe40fcf917d53db30d187c519bf62
> 





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^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 13/13] kvx: dts: Update k200.dts
  2022-01-14 16:54   ` [PATCH 13/13] kvx: dts: Update k200.dts Jules Maselbas
@ 2022-01-14 17:31     ` Clément Léger
  0 siblings, 0 replies; 22+ messages in thread
From: Clément Léger @ 2022-01-14 17:31 UTC (permalink / raw)
  To: Jules Maselbas; +Cc: barebox, Louis Morhet, Luc Michel, Yann Sionneau

Le Fri, 14 Jan 2022 17:54:56 +0100,
Jules Maselbas <jmaselbas@kalray.eu> a écrit :

> +		apb {
> +			compatible = "simple-bus";
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			ranges;
> +
> +			gpio0: gpio@20230000 {
> +				compatible = "snps,dw-apb-gpio";
> +				reg = <0x0 0x20230000 0x0 0x1000>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				gpio0_banka: gpio-controller@0 {
> +					compatible = "snps,dw-apb-gpio-port";
> +					#address-cells = <0>;
> +					gpio-controller;
> +					#gpio-cells = <2>;
> +					snps,nr-gpios = <32>;
> +					snps,has-pinctrl;
> +					reg = <0>;
> +					interrupt-parent = <&itgen_soc_periph0>;
> +					interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
> +					/* All pins of port A are interrupt capable */
> +					interrupt-controller;
> +					#interrupt-cells = <2>;
> +
> +					uart0_pins: pinmux_uart0_pins {
> +						function = "hw";
> +						pins = "pin0", "pin1";
> +					};
> +					uart1_pins: pinmux_uart1_pins {
> +						function = "hw";
> +						pins = "pin2", "pin3";
> +					};
> +					uart2_pins: pinmux_uart2_pins {
> +						function = "hw";
> +						pins = "pin4", "pin5";
> +					};
> +					can0_pins: pinmux_can0_pins {
> +						function = "hw";
> +						pins = "pin6", "pin7";
> +					};
> +					can1_pins: pinmux_can1_pins {
> +						function = "hw";
> +						pins = "pin8", "pin9";
> +					};
> +					i2c0_pins: pinmux_i2c0_pins {
> +						function = "hw";
> +						pins = "pin10", "pin11";
> +					};
> +					smb1_pins: pinmux_smb1_pins {
> +						function = "hw";
> +						pins = "pin12", "pin13";
> +					};
> +					smb2_pins: pinmux_smb2_pins {
> +						function = "hw";
> +						pins = "pin14", "pin15";
> +					};
> +					qspi0_master_pins:pinmux_qspi0_master_pins {
> +						function = "hw";
> +						pins = "pin18", "pin19", "pin20", "pin21", "pin22", "pin23", "pin24";
> +					};
> +					spi_slave_pins:pinmux_spi_slave_pins {
> +						function = "hw";
> +						pins = "pin25", "pin26", "pin27", "pin28";
> +					};
> +					timer0_pins:pinmux_timer0_pins {
> +						function = "hw";
> +						pins = "pin29";
> +					};
> +					timer1_pins:pinmux_timer1_pins {
> +						function = "hw";
> +						pins = "pin30";
> +					};
> +					timer2_pins:pinmux_timer2_pins {
> +						function = "hw";
> +						pins = "pin31";
> +					};

Hi Jules,

I'm afraid this won't work at all since the upstream
snps,dw-apb-gpio compatible driver does not handle pinctrl yet. The
support for that is in your private tree I guess [1].

Clément

[1]
https://github.com/kalray/barebox/blob/coolidge/drivers/pinctrl/pinctrl-dw.c
> +				};
> +			};
> +
> +			gpio1: gpio@20231000 {
> +				compatible = "snps,dw-apb-gpio";
> +				reg = <0x0 0x20231000 0x0 0x1000>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				gpio1_banka: gpio-controller@0 {
> +					compatible = "snps,dw-apb-gpio-port";
> +					#address-cells = <0>;
> +					gpio-controller;
> +					#gpio-cells = <2>;
> +					snps,nr-gpios = <32>;
> +					snps,has-pinctrl;
> +					reg = <0>;
> +					interrupt-parent = <&itgen_soc_periph0>;
> +					interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
> +					/* All pins of port A are interrupt capable */
> +					interrupt-controller;
> +					#interrupt-cells = <2>;
> +
> +					uart3_pins: pinmux_uart3_pins {
> +						function = "hw";
> +						pins = "pin0", "pin1";
> +					};
> +					uart4_pins: pinmux_uart4_pins {
> +						function = "hw";
> +						pins = "pin2", "pin3";
> +					};
> +					uart5_pins: pinmux_uart5_pins {
> +						function = "hw";
> +						pins = "pin4", "pin5";
> +					};
> +					can2_pins: pinmux_can2_pins {
> +						function = "hw";
> +						pins = "pin6", "pin7";
> +					};
> +					can3_pins: pinmux_can3_pins {
> +						function = "hw";
> +						pins = "pin8", "pin9";
> +					};
> +					i2c3_pins: pinmux_i2c3_pins {
> +						function = "hw";
> +						pins = "pin10", "pin11";
> +					};
> +					smb4_pins: pinmux_smb4_pins {
> +						function = "hw";
> +						pins = "pin12", "pin13";
> +					};
> +					timer3_pins:pinmux_timer3_pins {
> +						function = "hw";
> +						pins = "pin15";
> +					};
> +					timer4_pins:pinmux_timer4_pins {
> +						function = "hw";
> +						pins = "pin16";
> +					};
> +					timer5_pins:pinmux_timer5_pins {
> +						function = "hw";
> +						pins = "pin17";
> +					};
> +					qspi1_master_pins:pinmux_qspi1_master_pins {
> +						function = "hw";
> +						pins = "pin18", "pin19", "pin20", "pin21", "pin22", "pin23", "pin24";
> +					};
> +					qspi2_master_pins:pinmux_qspi2_master_pins {
> +						function = "hw";
> +						pins = "pin25", "pin26", "pin27", "pin28", "pin29", "pin30", "pin31";
> +					};
> +				};
> +			};
>  		};
>  	};
>  };


-- 
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com

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^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 08/13] nvmem: add kvx otp non volatile regbank support
  2022-01-14 16:52 ` [PATCH 08/13] nvmem: add kvx otp non volatile regbank support Jules Maselbas
@ 2022-01-17  8:24   ` Sascha Hauer
  2022-01-17 11:17     ` Jules Maselbas
  0 siblings, 1 reply; 22+ messages in thread
From: Sascha Hauer @ 2022-01-17  8:24 UTC (permalink / raw)
  To: Jules Maselbas
  Cc: barebox, Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau,
	Clement Leger

On Fri, Jan 14, 2022 at 05:52:07PM +0100, Jules Maselbas wrote:
> From: Clement Leger <cleger@kalray.eu>
> 
> Backport Linux driver to barebox to access nvmem.
> 
> Signed-off-by: Clement Leger <cleger@kalray.eu>
> Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
> ---
>  drivers/nvmem/Kconfig      |  7 +++
>  drivers/nvmem/Makefile     |  3 ++
>  drivers/nvmem/kvx-otp-nv.c | 99 ++++++++++++++++++++++++++++++++++++++
>  3 files changed, 109 insertions(+)
>  create mode 100644 drivers/nvmem/kvx-otp-nv.c
> 
> diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
> index 07320101b8..3624cc64b6 100644
> --- a/drivers/nvmem/Kconfig
> +++ b/drivers/nvmem/Kconfig
> @@ -66,6 +66,13 @@ config STM32_BSEC
>  	  This adds support for the STM32 OTP controller. Reads and writes
>  	  to will go to the shadow RAM, not the OTP fuses themselvers.
>  
> +config KVX_OTP_NV
> +	tristate "kalray KVX OTP Non volatile regs Support"
> +	depends on KVX
> +	help
> +	  This is a simple driver to dump specified values of KVX OTP non
> +	  volatile regs.
> +
>  config STARFIVE_OTP
>  	tristate "Starfive OTP Supprot"
>  	depends on SOC_STARFIVE
> diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
> index cd970aaea1..81629ddb27 100644
> --- a/drivers/nvmem/Makefile
> +++ b/drivers/nvmem/Makefile
> @@ -24,4 +24,7 @@ nvmem_eeprom_93xx46-y		:= eeprom_93xx46.o
>  obj-$(CONFIG_STM32_BSEC)	+= nvmem_bsec.o
>  nvmem_bsec-y			:= bsec.o
>  
> +obj-$(CONFIG_KVX_OTP_NV)	+= nvmem-kvx-otp-nv.o
> +nvmem-kvx-otp-nv-y		:= kvx-otp-nv.o
> +
>  obj-$(CONFIG_STARFIVE_OTP)	+= starfive-otp.o
> diff --git a/drivers/nvmem/kvx-otp-nv.c b/drivers/nvmem/kvx-otp-nv.c
> new file mode 100644
> index 0000000000..f997f8a63b
> --- /dev/null
> +++ b/drivers/nvmem/kvx-otp-nv.c
> @@ -0,0 +1,99 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) 2020 Kalray Inc., Clément Léger
> + */
> +
> +#include <common.h>
> +#include <driver.h>
> +#include <malloc.h>
> +#include <xfuncs.h>
> +#include <errno.h>
> +#include <init.h>
> +#include <net.h>
> +#include <io.h>
> +
> +#include <linux/nvmem-provider.h>
> +
> +#define OTP_NV_ALIGN		4
> +#define OTP_NV_ALIGN_MASK	(OTP_NV_ALIGN - 1)
> +
> +struct kvx_otp_nv_priv {
> +	void __iomem *base;
> +};
> +
> +static int kvx_otp_nv_read(void *context, unsigned int offset,
> +			  void *_val, size_t bytes)
> +{
> +	struct kvx_otp_nv_priv *priv = context;
> +	u8 *val = _val;
> +	u32 tmp, copy_size;
> +	u8 skip = offset & OTP_NV_ALIGN_MASK;
> +
> +	offset &= ~OTP_NV_ALIGN_MASK;
> +
> +	while (bytes) {
> +		tmp = readl(priv->base + offset);
> +		if (skip != 0)
> +			copy_size = min(OTP_NV_ALIGN - skip, (int) bytes);
> +		else
> +			copy_size = min(bytes, sizeof(tmp));
> +
> +		memcpy(val, ((u8 *) &tmp) + skip, copy_size);
> +		if (skip != 0)
> +			skip = 0;

The if() here is unnecessary.

Sascha

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH 08/13] nvmem: add kvx otp non volatile regbank support
  2022-01-17  8:24   ` Sascha Hauer
@ 2022-01-17 11:17     ` Jules Maselbas
  0 siblings, 0 replies; 22+ messages in thread
From: Jules Maselbas @ 2022-01-17 11:17 UTC (permalink / raw)
  To: Sascha Hauer
  Cc: barebox, Clement Leger, Louis Morhet, Luc Michel, Yann Sionneau,
	Clement Leger

> > +static int kvx_otp_nv_read(void *context, unsigned int offset,
> > +			  void *_val, size_t bytes)
> > +{
> > +	struct kvx_otp_nv_priv *priv = context;
> > +	u8 *val = _val;
> > +	u32 tmp, copy_size;
> > +	u8 skip = offset & OTP_NV_ALIGN_MASK;
> > +
> > +	offset &= ~OTP_NV_ALIGN_MASK;
> > +
> > +	while (bytes) {
> > +		tmp = readl(priv->base + offset);
> > +		if (skip != 0)
> > +			copy_size = min(OTP_NV_ALIGN - skip, (int) bytes);
> > +		else
> > +			copy_size = min(bytes, sizeof(tmp));
> > +
> > +		memcpy(val, ((u8 *) &tmp) + skip, copy_size);
> > +		if (skip != 0)
> > +			skip = 0;
> 
> The if() here is unnecessary.
Indeed, thanks.






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^ permalink raw reply	[flat|nested] 22+ messages in thread

end of thread, other threads:[~2022-01-17 11:19 UTC | newest]

Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-01-14 16:51 [PATCH 00/13] kvx arch update Jules Maselbas
2022-01-14 16:52 ` [PATCH 01/13] kvx: dma: Remove arch dma_map/unmap_single Jules Maselbas
2022-01-14 16:52 ` [PATCH 02/13] kvx: Move LINUX_BOOT_PARAM_MAGIC in asm/common.h Jules Maselbas
2022-01-14 16:52 ` [PATCH 03/13] kvx: Accept LINUX_BOOT_PARAM_MAGIC as a valid magic value Jules Maselbas
2022-01-14 16:52 ` [PATCH 04/13] common: elf: add elf_load_binary Jules Maselbas
2022-01-14 17:21   ` Clément Léger
2022-01-14 17:24     ` Jules Maselbas
2022-01-14 16:52 ` [PATCH 05/13] kvx: enable FITIMAGE support Jules Maselbas
2022-01-14 16:52 ` [PATCH 06/13] clocksource: kvx: Register as postcore_platform_driver Jules Maselbas
2022-01-14 16:52 ` [PATCH 07/13] watchdog: kvx: do not disable watchdog on probe Jules Maselbas
2022-01-14 16:52 ` [PATCH 08/13] nvmem: add kvx otp non volatile regbank support Jules Maselbas
2022-01-17  8:24   ` Sascha Hauer
2022-01-17 11:17     ` Jules Maselbas
2022-01-14 16:52 ` [PATCH 09/13] kvx: add kvx_sfr_field_val Jules Maselbas
2022-01-14 16:54 ` [PATCH 10/13] drivers: add soc hierarchy properly Jules Maselbas
2022-01-14 16:54   ` [PATCH 11/13] soc: add kvx_socinfo driver Jules Maselbas
2022-01-14 16:54   ` [PATCH 12/13] kvx: Update defconfig Jules Maselbas
2022-01-14 16:54   ` [PATCH 13/13] kvx: dts: Update k200.dts Jules Maselbas
2022-01-14 17:31     ` Clément Léger
2022-01-14 17:06   ` [PATCH 10/13] drivers: add soc hierarchy properly Ahmad Fatoum
2022-01-14 17:11     ` Jules Maselbas
2022-01-14 17:20       ` Ahmad Fatoum

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