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From: Alexander Shiyan <eagle.alexander923@gmail.com>
To: barebox@lists.infradead.org
Cc: Alexander Shiyan <eagle.alexander923@gmail.com>
Subject: [RFC 2/2] clocksource: arm_global_timer: Convert driver to use clocksource context field
Date: Fri, 10 Jun 2022 11:56:32 +0300	[thread overview]
Message-ID: <20220610085633.21606-2-eagle.alexander923@gmail.com> (raw)
In-Reply-To: <20220610085633.21606-1-eagle.alexander923@gmail.com>

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
---
 drivers/clocksource/arm_global_timer.c | 27 +++++++++++++++-----------
 1 file changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/clocksource/arm_global_timer.c b/drivers/clocksource/arm_global_timer.c
index 6e2fae9ba4..3e9b90059a 100644
--- a/drivers/clocksource/arm_global_timer.c
+++ b/drivers/clocksource/arm_global_timer.c
@@ -27,8 +27,6 @@
 #define GT_CONTROL	0x08
 #define GT_CONTROL_TIMER_ENABLE		BIT(0)  /* this bit is NOT banked */
 
-static void __iomem *gt_base;
-
 /*
  * To get the value from the Global Timer Counter register proceed as follows:
  * 1. Read the upper 32-bit timer counter register
@@ -39,6 +37,7 @@ static void __iomem *gt_base;
  */
 static uint64_t arm_global_clocksource_read(void *ctx)
 {
+	void __iomem *gt_base = ctx;
 	uint64_t counter;
 	uint32_t lower;
 	uint32_t upper, old_upper;
@@ -56,11 +55,25 @@ static uint64_t arm_global_clocksource_read(void *ctx)
 	return counter;
 }
 
+static int arm_global_timer_init(struct clocksource *cs)
+{
+	void __iomem *gt_base = cs->ctx;
+
+	writel(0, gt_base + GT_CONTROL);
+	writel(0, gt_base + GT_COUNTER0);
+	writel(0, gt_base + GT_COUNTER1);
+	/* enables timer on all the cores */
+	writel(GT_CONTROL_TIMER_ENABLE, gt_base + GT_CONTROL);
+
+	return 0;
+}
+
 static struct clocksource cs = {
 	.read	= arm_global_clocksource_read,
 	.mask	= CLOCKSOURCE_MASK(64),
 	.shift	= 0,
 	.priority = 70,
+	.init	= arm_global_timer_init,
 };
 
 static int arm_global_timer_probe(struct device_d *dev)
@@ -86,17 +99,9 @@ static int arm_global_timer_probe(struct device_d *dev)
 		return ret;
 	}
 
-	gt_base = IOMEM(iores->start);
-
 	cs.mult = clocksource_hz2mult(clk_get_rate(clk), cs.shift);
 
-	writel(0, gt_base + GT_CONTROL);
-	writel(0, gt_base + GT_COUNTER0);
-	writel(0, gt_base + GT_COUNTER1);
-	/* enables timer on all the cores */
-	writel(GT_CONTROL_TIMER_ENABLE, gt_base + GT_CONTROL);
-
-	return init_clock(&cs, NULL);
+	return init_clock(&cs, IOMEM(iores->start));
 }
 
 static struct of_device_id arm_global_timer_dt_ids[] = {
-- 
2.32.0


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  reply	other threads:[~2022-06-10  8:58 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-10  8:56 [RFC 1/2] clocksource: Introduce a context storage for the clocksource structure Alexander Shiyan
2022-06-10  8:56 ` Alexander Shiyan [this message]
2022-06-10  9:40   ` [RFC 2/2] clocksource: arm_global_timer: Convert driver to use clocksource context field Sascha Hauer
2022-06-10  9:53     ` Alexander Shiyan
2022-06-10  8:56 ` [RFC 0/2] Context storage for the clocksource Alexander Shiyan
2022-06-10  9:35 ` [RFC 1/2] clocksource: Introduce a context storage for the clocksource structure Sascha Hauer
2022-06-10  9:42   ` Alexander Shiyan
2022-06-10  9:44     ` Sascha Hauer

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