* at91 sama5d3 "regressions"
@ 2021-09-17 22:37 Peter Rosin
2021-09-17 22:39 ` [PATCH 1/4] common.h: reintroduce region_overlap() as, old_region_overlap() Peter Rosin
` (4 more replies)
0 siblings, 5 replies; 14+ messages in thread
From: Peter Rosin @ 2021-09-17 22:37 UTC (permalink / raw)
To: Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List
Hi!
I have old boards that I'm trying to get up to current
revisions of various pieces of software, and I'm running
into a couple of problems with barebox. After bisecting
and sorting though git history for a couple of days,
these are my findings...
1st problematic patch:
070de908da ("ARM: remove PBL_FORCE_PIGGYDATA_COPY")
This patch claims to remove an option, but it also kills a region
overlap test that I appear to need on my board. This gets further
complicated by patches
81ca755487 ("common.h: remove unused region_overlap()")
04e2aa516e ("common.h: move and rename lregion_overlap()")
that first removes the needed but unused function, and then
repurposes its name, and by patch
0be48260b8 ("ARM: Merge single pbl with multi pbl")
which merges the old single pbl function into the multi pbl case.
2nd problematic patch
3e4a040545 ("ARM: mmu: use client domain permissions to support ARMv7 eXecute Never")
This just doesn't work for my boards, and I need to revert it.
3rd problematic patch
c5d38e9201 ("lds: Add and use RO_DATA_SECTION macro")
Again, just doesn't work on my board. I'm doing a partial revert, but
that gets further complicated by patch
cd23b6facf ("common: add initial barebox deep-probe support")
which piles in one more entry in the non-functional RO_DATA_SECTION
macro.
I'm going to follow up with patches. I very much realize that
these patches are most likely not acceptable as-is, but I do
include them since they are probably the best description of
where the problems are.
Cheers,
Peter
Peter Rosin (4):
common.h: reintroduce region_overlap() as old_region_overlap()
ARM: copy data if there is a region overlap
Revert "ARM: mmu: use client domain permissions to support ARMv7
eXecute Never"
lds: the RO_DATA_SECTION macro does not work on my SAMA5D3 board
arch/arm/cpu/mmu-early.c | 7 +------
arch/arm/cpu/mmu.c | 7 +------
arch/arm/cpu/mmu.h | 1 -
arch/arm/cpu/uncompress.c | 12 ++++++++++++
arch/arm/lib32/barebox.lds.S | 15 +++++++++++----
include/common.h | 14 ++++++++++++++
6 files changed, 39 insertions(+), 17 deletions(-)
--
2.20.1
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^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 1/4] common.h: reintroduce region_overlap() as, old_region_overlap() 2021-09-17 22:37 at91 sama5d3 "regressions" Peter Rosin @ 2021-09-17 22:39 ` Peter Rosin 2021-09-17 22:39 ` [PATCH 2/4] ARM: copy data if there is a region overlap Peter Rosin ` (3 subsequent siblings) 4 siblings, 0 replies; 14+ messages in thread From: Peter Rosin @ 2021-09-17 22:39 UTC (permalink / raw) To: Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List The region_overlap() function was removed as unused by patch 81ca755487 ("common.h: remove unused region_overlap()") but only because the last user was prematurely removed by patch 070de908da ("ARM: remove PBL_FORCE_PIGGYDATA_COPY") A clean reverts is not appropriate, as the previous name of the function has been repurposed by patch 04e2aa516e ("common.h: move and rename lregion_overlap()") Signed-off-by: Peter Rosin <peda@axentia.se> --- include/common.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/include/common.h b/include/common.h index 693f5bf97029..10cf5f732cbf 100644 --- a/include/common.h +++ b/include/common.h @@ -137,4 +137,18 @@ const char *barebox_get_hostname(void); void barebox_set_hostname(const char *); void barebox_set_hostname_no_overwrite(const char *); +/* + * Check if two regions overlap. returns true if they do, false otherwise + */ + +static inline bool old_region_overlap(unsigned long starta, unsigned long lena, + unsigned long startb, unsigned long lenb) +{ + if (starta + lena <= startb) + return 0; + if (startb + lenb <= starta) + return 0; + return 1; +} + #endif /* __COMMON_H_ */ -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 2/4] ARM: copy data if there is a region overlap 2021-09-17 22:37 at91 sama5d3 "regressions" Peter Rosin 2021-09-17 22:39 ` [PATCH 1/4] common.h: reintroduce region_overlap() as, old_region_overlap() Peter Rosin @ 2021-09-17 22:39 ` Peter Rosin 2021-09-17 22:40 ` [PATCH 3/4] Revert "ARM: mmu: use client domain permissions to support ARMv7 eXecute Never" Peter Rosin ` (2 subsequent siblings) 4 siblings, 0 replies; 14+ messages in thread From: Peter Rosin @ 2021-09-17 22:39 UTC (permalink / raw) To: Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List This is a partial revert of patch 070de908da ("ARM: remove PBL_FORCE_PIGGYDATA_COPY") Without this copy, my SAMA5D3 board fails to start. Fixes: 070de908da ("ARM: remove PBL_FORCE_PIGGYDATA_COPY") Signed-off-by: Peter Rosin <peda@axentia.se> --- arch/arm/cpu/uncompress.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/cpu/uncompress.c b/arch/arm/cpu/uncompress.c index 2250b8ccd375..d725e7c2c34d 100644 --- a/arch/arm/cpu/uncompress.c +++ b/arch/arm/cpu/uncompress.c @@ -45,6 +45,7 @@ extern unsigned char input_data_end[]; void __noreturn barebox_pbl_start(unsigned long membase, unsigned long memsize, void *boarddata) { + unsigned long offset; uint32_t pg_len, uncompressed_len; void __noreturn (*barebox)(unsigned long, unsigned long, void *); unsigned long endmem = membase + memsize; @@ -52,6 +53,9 @@ void __noreturn barebox_pbl_start(unsigned long membase, unsigned long memsize, void *pg_start, *pg_end; unsigned long pc = get_pc(); + /* Get offset between linked address and runtime address */ + offset = get_runtime_offset(); + /* piggy data is not relocated, so determine the bounds now */ pg_start = input_data + global_variable_offset(); pg_end = input_data_end + global_variable_offset(); @@ -77,6 +81,14 @@ void __noreturn barebox_pbl_start(unsigned long membase, unsigned long memsize, else barebox_base = TEXT_BASE; + if (offset && old_region_overlap(pg_start, pg_len, barebox_base, pg_len * 4)) { + /* + * copy piggydata binary to its link address + */ + memcpy(&input_data, (void *)pg_start, pg_len); + pg_start = (uint32_t)&input_data; + } + setup_c(); pr_debug("memory at 0x%08lx, size 0x%08lx\n", membase, memsize); -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 3/4] Revert "ARM: mmu: use client domain permissions to support ARMv7 eXecute Never" 2021-09-17 22:37 at91 sama5d3 "regressions" Peter Rosin 2021-09-17 22:39 ` [PATCH 1/4] common.h: reintroduce region_overlap() as, old_region_overlap() Peter Rosin 2021-09-17 22:39 ` [PATCH 2/4] ARM: copy data if there is a region overlap Peter Rosin @ 2021-09-17 22:40 ` Peter Rosin 2021-09-19 7:06 ` Rouven Czerwinski 2021-09-17 22:41 ` [PATCH 4/4] lds: the RO_DATA_SECTION macro does not work on my SAMA5D3 board Peter Rosin 2021-09-17 23:57 ` at91 sama5d3 "regressions" Peter Rosin 4 siblings, 1 reply; 14+ messages in thread From: Peter Rosin @ 2021-09-17 22:40 UTC (permalink / raw) To: Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List This reverts commit 3e4a0405455f66fbae0a98dc1faee5c7c39f17a2. The patch breaks my SAMA5D3 board. Signed-off-by: Peter Rosin <peda@axentia.se> --- arch/arm/cpu/mmu-early.c | 7 +------ arch/arm/cpu/mmu.c | 7 +------ arch/arm/cpu/mmu.h | 1 - 3 files changed, 2 insertions(+), 13 deletions(-) diff --git a/arch/arm/cpu/mmu-early.c b/arch/arm/cpu/mmu-early.c index b985aa455fe8..92b1161985fb 100644 --- a/arch/arm/cpu/mmu-early.c +++ b/arch/arm/cpu/mmu-early.c @@ -29,12 +29,7 @@ void mmu_early_enable(unsigned long membase, unsigned long memsize, arm_set_cache_functions(); set_ttbr(ttb); - - /* For the XN bit to take effect, we can't be using DOMAIN_MANAGER. */ - if (cpu_architecture() >= CPU_ARCH_ARMv7) - set_domain(DOMAIN_CLIENT); - else - set_domain(DOMAIN_MANAGER); + set_domain(DOMAIN_MANAGER); /* * This marks the whole address space as uncachable as well as diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index 6388e1bf14f6..d0aff9e7f027 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -452,12 +452,7 @@ void __mmu_init(bool mmu_on) ttb = xmemalign(ARM_TTB_SIZE, ARM_TTB_SIZE); set_ttbr(ttb); - - /* For the XN bit to take effect, we can't be using DOMAIN_MANAGER. */ - if (cpu_architecture() >= CPU_ARCH_ARMv7) - set_domain(DOMAIN_CLIENT); - else - set_domain(DOMAIN_MANAGER); + set_domain(DOMAIN_MANAGER); create_flat_mapping(ttb); __mmu_cache_flush(); diff --git a/arch/arm/cpu/mmu.h b/arch/arm/cpu/mmu.h index c85e0ea05033..e8b72662cddc 100644 --- a/arch/arm/cpu/mmu.h +++ b/arch/arm/cpu/mmu.h @@ -36,7 +36,6 @@ static inline void set_ttbr(void *ttb) asm volatile ("mcr p15,0,%0,c2,c0,0" : : "r"(ttb) /*:*/); } -#define DOMAIN_CLIENT 1 #define DOMAIN_MANAGER 3 static inline unsigned long get_domain(void) -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/4] Revert "ARM: mmu: use client domain permissions to support ARMv7 eXecute Never" 2021-09-17 22:40 ` [PATCH 3/4] Revert "ARM: mmu: use client domain permissions to support ARMv7 eXecute Never" Peter Rosin @ 2021-09-19 7:06 ` Rouven Czerwinski 2021-09-19 7:50 ` Peter Rosin 0 siblings, 1 reply; 14+ messages in thread From: Rouven Czerwinski @ 2021-09-19 7:06 UTC (permalink / raw) To: Peter Rosin, Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List Hi Peter, while this may break for your board, it fundamentally introduces the possibility to speculate out of the RAM area on speculation happy processors. Are you calling into SAMA5D3 ROM code somewhere? If so an exception can be added similar to the handling for the HAB code (arch/arm/cpu/mmu_early.c): if (IS_ENABLED(CONFIG_HABV4) && IS_ENABLED(CONFIG_ARCH_IMX6)) map_region(0x0, SZ_1M, PMD_SECT_DEF_CACHED); which allows calls into the NXP boot ROM to retrieve the HAB status. Regards, Rouven On Sat, 2021-09-18 at 00:40 +0200, Peter Rosin wrote: > This reverts commit 3e4a0405455f66fbae0a98dc1faee5c7c39f17a2. > > The patch breaks my SAMA5D3 board. > > Signed-off-by: Peter Rosin <peda@axentia.se> > --- > arch/arm/cpu/mmu-early.c | 7 +------ > arch/arm/cpu/mmu.c | 7 +------ > arch/arm/cpu/mmu.h | 1 - > 3 files changed, 2 insertions(+), 13 deletions(-) > > diff --git a/arch/arm/cpu/mmu-early.c b/arch/arm/cpu/mmu-early.c > index b985aa455fe8..92b1161985fb 100644 > --- a/arch/arm/cpu/mmu-early.c > +++ b/arch/arm/cpu/mmu-early.c > @@ -29,12 +29,7 @@ void mmu_early_enable(unsigned long membase, unsigned long memsize, > arm_set_cache_functions(); > > set_ttbr(ttb); > - > - /* For the XN bit to take effect, we can't be using DOMAIN_MANAGER. */ > - if (cpu_architecture() >= CPU_ARCH_ARMv7) > - set_domain(DOMAIN_CLIENT); > - else > - set_domain(DOMAIN_MANAGER); > + set_domain(DOMAIN_MANAGER); > > /* > * This marks the whole address space as uncachable as well as > diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c > index 6388e1bf14f6..d0aff9e7f027 100644 > --- a/arch/arm/cpu/mmu.c > +++ b/arch/arm/cpu/mmu.c > @@ -452,12 +452,7 @@ void __mmu_init(bool mmu_on) > ttb = xmemalign(ARM_TTB_SIZE, ARM_TTB_SIZE); > > set_ttbr(ttb); > - > - /* For the XN bit to take effect, we can't be using DOMAIN_MANAGER. */ > - if (cpu_architecture() >= CPU_ARCH_ARMv7) > - set_domain(DOMAIN_CLIENT); > - else > - set_domain(DOMAIN_MANAGER); > + set_domain(DOMAIN_MANAGER); > > create_flat_mapping(ttb); > __mmu_cache_flush(); > diff --git a/arch/arm/cpu/mmu.h b/arch/arm/cpu/mmu.h > index c85e0ea05033..e8b72662cddc 100644 > --- a/arch/arm/cpu/mmu.h > +++ b/arch/arm/cpu/mmu.h > @@ -36,7 +36,6 @@ static inline void set_ttbr(void *ttb) > asm volatile ("mcr p15,0,%0,c2,c0,0" : : "r"(ttb) /*:*/); > } > > -#define DOMAIN_CLIENT 1 > #define DOMAIN_MANAGER 3 > > static inline unsigned long get_domain(void) _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/4] Revert "ARM: mmu: use client domain permissions to support ARMv7 eXecute Never" 2021-09-19 7:06 ` Rouven Czerwinski @ 2021-09-19 7:50 ` Peter Rosin 2021-09-19 20:33 ` Peter Rosin 2021-09-20 9:14 ` Ahmad Fatoum 0 siblings, 2 replies; 14+ messages in thread From: Peter Rosin @ 2021-09-19 7:50 UTC (permalink / raw) To: Rouven Czerwinski, Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List On 2021-09-19 09:06, Rouven Czerwinski wrote: > Hi Peter, > > while this may break for your board, it fundamentally introduces the > possibility to speculate out of the RAM area on speculation happy I'm aware of that. For me, speculation is not an issue since *any* rogue code running on the embedded device in question is a major fail. Also, from the cover letter: "I'm going to follow up with patches. I very much realize that these patches are most likely not acceptable as-is, but I do include them since they are probably the best description of where the problems are." > processors. Are you calling into SAMA5D3 ROM code somewhere? If so an *I* am not calling anything. Maybe the board code for sama5d3xek is, but I have no idea as it's not "my" code. How can I figure out if it does? Cheers, Peter > exception can be added similar to the handling for the HAB code > (arch/arm/cpu/mmu_early.c): > > if (IS_ENABLED(CONFIG_HABV4) && IS_ENABLED(CONFIG_ARCH_IMX6)) > map_region(0x0, SZ_1M, PMD_SECT_DEF_CACHED); > > which allows calls into the NXP boot ROM to retrieve the HAB status. _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/4] Revert "ARM: mmu: use client domain permissions to support ARMv7 eXecute Never" 2021-09-19 7:50 ` Peter Rosin @ 2021-09-19 20:33 ` Peter Rosin 2021-09-20 9:14 ` Ahmad Fatoum 1 sibling, 0 replies; 14+ messages in thread From: Peter Rosin @ 2021-09-19 20:33 UTC (permalink / raw) To: Rouven Czerwinski, Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List On 2021-09-19 09:50, Peter Rosin wrote: > On 2021-09-19 09:06, Rouven Czerwinski wrote: >> processors. Are you calling into SAMA5D3 ROM code somewhere? If so an > > *I* am not calling anything. Maybe the board code for sama5d3xek is, > but I have no idea as it's not "my" code. How can I figure out if it > does? I did some digging and I think calling into any ROM can be ruled out in this case. The only ROM that I can find in the sama5d3x datasheet is this one: - One 160 Kbyte Internal ROM Single-cycle Access at System Speed, Embedded Boot Loader: Boot on 8-bit NAND Flash, SDCard, eMMC, serial DataFlash, selectable Order AFAICT, the internal ROM only contains the first level boot loader, so the ROM is presumably never used after that stage. That said, I'm by no means an expert on the internal details of the sama5d3x... That, and there's no external ROM on the address bus. Cheers, Peter _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/4] Revert "ARM: mmu: use client domain permissions to support ARMv7 eXecute Never" 2021-09-19 7:50 ` Peter Rosin 2021-09-19 20:33 ` Peter Rosin @ 2021-09-20 9:14 ` Ahmad Fatoum 2021-09-20 10:22 ` Peter Rosin 1 sibling, 1 reply; 14+ messages in thread From: Ahmad Fatoum @ 2021-09-20 9:14 UTC (permalink / raw) To: Peter Rosin, Rouven Czerwinski, Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List Hi Peter, On 19.09.21 09:50, Peter Rosin wrote: > On 2021-09-19 09:06, Rouven Czerwinski wrote: >> Hi Peter, >> >> while this may break for your board, it fundamentally introduces the >> possibility to speculate out of the RAM area on speculation happy > > I'm aware of that. For me, speculation is not an issue since *any* > rogue code running on the embedded device in question is a major fail. We have seen Cortex-A7 CPUs speculatively executing I/O memory. That's why we mar everything eXecute-Never except for known memory banks and expect board code to mark any further regions that are safe to execute manually. > Also, from the cover letter: > > "I'm going to follow up with patches. I very much realize that > these patches are most likely not acceptable as-is, but I do > include them since they are probably the best description of > where the problems are." > >> processors. Are you calling into SAMA5D3 ROM code somewhere? If so an > > *I* am not calling anything. Maybe the board code for sama5d3xek is, > but I have no idea as it's not "my" code. How can I figure out if it > does? If you don't revert this patch. Do you get any output at all? If not, enable DEBUG_LL and see how far you get before hanging. Cheers, Ahad > > Cheers, > Peter > >> exception can be added similar to the handling for the HAB code >> (arch/arm/cpu/mmu_early.c): >> >> if (IS_ENABLED(CONFIG_HABV4) && IS_ENABLED(CONFIG_ARCH_IMX6)) >> map_region(0x0, SZ_1M, PMD_SECT_DEF_CACHED); >> >> which allows calls into the NXP boot ROM to retrieve the HAB status. > > _______________________________________________ > barebox mailing list > barebox@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/barebox > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/4] Revert "ARM: mmu: use client domain permissions to support ARMv7 eXecute Never" 2021-09-20 9:14 ` Ahmad Fatoum @ 2021-09-20 10:22 ` Peter Rosin 0 siblings, 0 replies; 14+ messages in thread From: Peter Rosin @ 2021-09-20 10:22 UTC (permalink / raw) To: Ahmad Fatoum, Rouven Czerwinski, Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List On 2021-09-20 11:14, Ahmad Fatoum wrote: > Hi Peter, > > On 19.09.21 09:50, Peter Rosin wrote: >> On 2021-09-19 09:06, Rouven Czerwinski wrote: >>> Hi Peter, >>> >>> while this may break for your board, it fundamentally introduces the >>> possibility to speculate out of the RAM area on speculation happy >> >> I'm aware of that. For me, speculation is not an issue since *any* >> rogue code running on the embedded device in question is a major fail. > > We have seen Cortex-A7 CPUs speculatively executing I/O memory. That's > why we mar everything eXecute-Never except for known memory banks and > expect board code to mark any further regions that are safe to execute > manually. > >> Also, from the cover letter: >> >> "I'm going to follow up with patches. I very much realize that >> these patches are most likely not acceptable as-is, but I do >> include them since they are probably the best description of >> where the problems are." >> >>> processors. Are you calling into SAMA5D3 ROM code somewhere? If so an >> >> *I* am not calling anything. Maybe the board code for sama5d3xek is, >> but I have no idea as it's not "my" code. How can I figure out if it >> does? > > If you don't revert this patch. Do you get any output at all? > If not, enable DEBUG_LL and see how far you get before hanging. > No output regardless, if the patch is not reverted (patches 1, 2 and 4 still applied). I only get the following from ROM code and bootstrap: -----------------8<------------------ RomBOOT AT91Bootstrap 3.10.4 (2021-09-16 21:12:56) NAND: ONFI flash detected NAND: Manufacturer ID: 0x2c Chip ID: 0xac NAND: Page Bytes: 2048, Spare Bytes: 64 NAND: ECC Correctability Bits: 4, ECC Sector Bytes: 512 NAND: Disable On-Die ECC NAND: Initialize PMECC params, cap: 4, sector: 512 NAND: Image: Copy 0xa0000 bytes from 0x40000 to 0x26f00000 NAND: Done to load image -----------------8<------------------ If I also include patch 3 I get this: -----------------8<------------------ initcall-> 0x26f025f8 initcall-> 0x26f07024 initcall-> 0x26f0d108 initcall-> 0x26f0e218 initcall-> 0x26f1fd5c initcall-> 0x26f39b74 initcall-> 0x26f4090c initcall-> 0x26f427d0 initcall-> 0x26f239b4 initcall-> 0x26f239a4 initcall-> 0x26f01494 initcall-> 0x26f1f8ec initcall-> 0x26f1f9f0 initcall-> 0x26f34c08 initcall-> 0x26f3961c initcall-> 0x26f41204 AT91: Detected soc type: sama5d3 AT91: Detected soc subtype: sama5d31 probe-> at91sam9x5-gpio0 probe-> at91sam9x5-gpio1 probe-> at91sam9x5-gpio2 probe-> at91sam9x5-gpio3 probe-> at91sam9x5-gpio4 probe-> at91-pit initcall-> 0x26f0fc40 initcall-> 0x26f40878 probe-> atmel_usart0 Switch to console [cs0] barebox 2021.08.0 #1 Mon Sep 20 12:10:05 CEST 2021 Board: Atmel sama5d3x-ek initcall-> 0x26f025f8 -----------------8<------------------ etc etc So, debugging is working (I added DEBUG_INITCALLS and DEBUG_PROBES in case that would cause earlier output). Cheers, Peter _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 4/4] lds: the RO_DATA_SECTION macro does not work on my SAMA5D3 board 2021-09-17 22:37 at91 sama5d3 "regressions" Peter Rosin ` (2 preceding siblings ...) 2021-09-17 22:40 ` [PATCH 3/4] Revert "ARM: mmu: use client domain permissions to support ARMv7 eXecute Never" Peter Rosin @ 2021-09-17 22:41 ` Peter Rosin 2021-09-17 23:57 ` at91 sama5d3 "regressions" Peter Rosin 4 siblings, 0 replies; 14+ messages in thread From: Peter Rosin @ 2021-09-17 22:41 UTC (permalink / raw) To: Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List This is a partial revert of patch c5d38e9201 ("lds: Add and use RO_DATA_SECTION macro") after adjusting to further changes made by cd23b6facf ("common: add initial barebox deep-probe support") Signed-off-by: Peter Rosin <peda@axentia.se> --- arch/arm/lib32/barebox.lds.S | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/arch/arm/lib32/barebox.lds.S b/arch/arm/lib32/barebox.lds.S index 77a5c525c5ae..0106026f13ca 100644 --- a/arch/arm/lib32/barebox.lds.S +++ b/arch/arm/lib32/barebox.lds.S @@ -38,10 +38,7 @@ SECTIONS BAREBOX_BARE_INIT_SIZE . = ALIGN(4); - .rodata : { - *(.rodata*) - RO_DATA_SECTION - } + .rodata : { *(.rodata*) } #ifdef CONFIG_ARM_UNWIND /* @@ -70,6 +67,16 @@ SECTIONS .barebox_imd : { BAREBOX_IMD } . = .; + .barebox_cmd : { BAREBOX_CMDS } + .barebox_ratp_cmd : { BAREBOX_RATP_CMDS } + .barebox_magicvar : { BAREBOX_MAGICVARS } + .barebox_initcalls : { BAREBOX_INITCALLS } + .barebox_exitcalls : { BAREBOX_EXITCALLS } + __usymtab : { BAREBOX_SYMS } + .pci_fixup : { BAREBOX_PCI_FIXUP } + .oftables : { BAREBOX_CLK_TABLE } + .dtb : { BAREBOX_DTB } + .deep_probe : { BAREBOX_DEEP_PROBE } .rel_dyn_start : { *(.__rel_dyn_start) } .rel.dyn : { *(.rel*) } -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: at91 sama5d3 "regressions" 2021-09-17 22:37 at91 sama5d3 "regressions" Peter Rosin ` (3 preceding siblings ...) 2021-09-17 22:41 ` [PATCH 4/4] lds: the RO_DATA_SECTION macro does not work on my SAMA5D3 board Peter Rosin @ 2021-09-17 23:57 ` Peter Rosin 2021-09-19 6:32 ` Peter Rosin 4 siblings, 1 reply; 14+ messages in thread From: Peter Rosin @ 2021-09-17 23:57 UTC (permalink / raw) To: Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List On 2021-09-18 00:37, Peter Rosin wrote: > Hi! > > I have old boards that I'm trying to get up to current > revisions of various pieces of software, and I'm running > into a couple of problems with barebox. After bisecting > and sorting though git history for a couple of days, > these are my findings... I meant to mention that I'm using this extra patch for my board. As you can see, it's been a couple of years, and it is not at all unlikely that the root cause is in these files, and that there has been changes in the other parts of the sama5d3 code that I need to pick up. I will dig into updating these files, and check if that help. Cheers, Peter >From 4dcf8d62b4f9a7383e93f0967c57742044c18b3d Mon Sep 17 00:00:00 2001 From: Peter Rosin <peda@axentia.se> Date: Wed, 7 Jun 2017 18:58:50 +0200 Subject: [PATCH] tse850: New board, very similar to sama5d31ek. Signed-off-by: Peter Rosin <peda@axentia.se> --- arch/arm/boards/Makefile | 1 + arch/arm/boards/tse850/Makefile | 1 + arch/arm/boards/tse850/env/config | 41 +++++++++ arch/arm/boards/tse850/init.c | 139 ++++++++++++++++++++++++++++++ arch/arm/configs/tse850_defconfig | 78 +++++++++++++++++ arch/arm/mach-at91/Kconfig | 5 ++ 6 files changed, 265 insertions(+) create mode 100644 arch/arm/boards/tse850/Makefile create mode 100644 arch/arm/boards/tse850/env/config create mode 100644 arch/arm/boards/tse850/init.c create mode 100644 arch/arm/configs/tse850_defconfig diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index 5aac64fce584..9219c8cd407a 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -148,6 +148,7 @@ obj-$(CONFIG_MACH_TOSHIBA_AC100) += toshiba-ac100/ obj-$(CONFIG_MACH_TQMA53) += tqma53/ obj-$(CONFIG_MACH_TQMA6X) += tqma6x/ obj-$(CONFIG_MACH_TURRIS_OMNIA) += turris-omnia/ +obj-$(CONFIG_MACH_TSE850) += tse850/ obj-$(CONFIG_MACH_TX25) += karo-tx25/ obj-$(CONFIG_MACH_TX28) += karo-tx28/ obj-$(CONFIG_MACH_TX53) += karo-tx53/ diff --git a/arch/arm/boards/tse850/Makefile b/arch/arm/boards/tse850/Makefile new file mode 100644 index 000000000000..eb072c016176 --- /dev/null +++ b/arch/arm/boards/tse850/Makefile @@ -0,0 +1 @@ +obj-y += init.o diff --git a/arch/arm/boards/tse850/env/config b/arch/arm/boards/tse850/env/config new file mode 100644 index 000000000000..52befe0dd93e --- /dev/null +++ b/arch/arm/boards/tse850/env/config @@ -0,0 +1,41 @@ +#!/bin/sh + +# use 'none' if you want to skip kernel ip autoconfiguration +ip=none + +# or set your networking parameters here +#eth0.ipaddr=a.b.c.d +#eth0.netmask=a.b.c.d +#eth0.gateway=a.b.c.d +#eth0.serverip=a.b.c.d + +# can be either 'nfs', 'tftp', 'nor' or 'nand' +kernel_loc=nand +# can be either 'net', 'nor', 'nand' or 'initrd' +rootfs_loc=nand +# can be either 'nfs', 'tftp', 'nand' or empty +oftree_loc=nand + +# can be either 'jffs2' or 'ubifs' +rootfs_type=ubifs +rootfsimage=root.$rootfs_type +ubiroot=rootfs + +# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo +kernelimage=zImage +#kernelimage=uImage +#kernelimage=Image +#kernelimage=Image.lzo + +nand_device=atmel_nand +nand_parts="256k(at91bootstrap),384k(barebox),256k@768k(bareboxenv),256k(bareboxenv2),128k@1536k(oftree),5M@2M(kernel),248M@8M(rootfs),-@256M(ovlfs)" +rootfs_mtdblock_nand=6 + +m25p80_parts="64k(bootstrap),384k(barebox),256k(bareboxenv),256k(bareboxenv2),128k(oftree),-(updater)" + +autoboot_timeout=1 + +bootargs="console=ttyS0,115200 rw oops=panic panic=30" + +# set a fancy prompt (if support is compiled in) +PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m\n# " diff --git a/arch/arm/boards/tse850/init.c b/arch/arm/boards/tse850/init.c new file mode 100644 index 000000000000..1166b5067f93 --- /dev/null +++ b/arch/arm/boards/tse850/init.c @@ -0,0 +1,139 @@ +/* + * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include <common.h> +#include <net.h> +#include <init.h> +#include <environment.h> +#include <asm/armlinux.h> +#include <generated/mach-types.h> +#include <partition.h> +#include <fs.h> +#include <fcntl.h> +#include <io.h> +#include <asm/hardware.h> +#include <nand.h> +#include <sizes.h> +#include <linux/mtd/nand.h> +#include <mach/board.h> +#include <mach/at91sam9_smc.h> +#include <mach/at91sam9_smc.h> +#include <gpio.h> +#include <mach/io.h> +#include <mach/at91_pmc.h> +#include <mach/at91_rstc.h> +#include <mach/at91sam9x5_matrix.h> +#include <input/qt1070.h> +#include <readkey.h> +#include <poller.h> +#include <linux/w1-gpio.h> +#include <w1_mac_address.h> +#include <spi/spi.h> +#include <linux/clk.h> +#include <linux/phy.h> +#include <linux/micrel_phy.h> + +#if defined(CONFIG_NAND_ATMEL) +static struct atmel_nand_data nand_pdata = { + .ale = 21, + .cle = 22, + .det_pin = -EINVAL, + .rdy_pin = -EINVAL, + .enable_pin = -EINVAL, + .ecc_mode = NAND_ECC_HW, + .pmecc_sector_size = 512, + .pmecc_corr_cap = 4, +#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) + .bus_width_16 = 1, +#endif + .on_flash_bbt = 1, +}; + +static struct sam9_smc_config cm_nand_smc_config = { + .ncs_read_setup = 0, + .nrd_setup = 1, + .ncs_write_setup = 0, + .nwe_setup = 1, + + .ncs_read_pulse = 6, + .nrd_pulse = 4, + .ncs_write_pulse = 5, + .nwe_pulse = 3, + + .read_cycle = 6, + .write_cycle = 5, + + .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, + .tdf_cycles = 1, +}; + +static void tse_850_add_device_nand(void) +{ + struct clk *clk = clk_get(NULL, "smc_clk"); + + clk_enable(clk); + + /* setup bus-width (8 or 16) */ + if (nand_pdata.bus_width_16) + cm_nand_smc_config.mode |= AT91_SMC_DBW_16; + else + cm_nand_smc_config.mode |= AT91_SMC_DBW_8; + + /* configure chip-select 3 (NAND) */ + sam9_smc_configure(0, 3, &cm_nand_smc_config); + + at91_add_device_nand(&nand_pdata); +} +#else +static void tse_850_add_device_nand(void) {} +#endif + +static int at91_tse_850_devices_init(void) +{ + tse_850_add_device_nand(); + + armlinux_set_bootparams((void *)(SAMA5_DDRCS + 0x100)); + + devfs_add_partition("nand0", 0x00000, SZ_256K, DEVFS_PARTITION_FIXED, "at91bootstrap_raw"); + dev_add_bb_dev("at91bootstrap_raw", "at91bootstrap"); + devfs_add_partition("nand0", SZ_256K, SZ_256K + SZ_128K, DEVFS_PARTITION_FIXED, "self_raw"); + dev_add_bb_dev("self_raw", "self0"); + devfs_add_partition("nand0", SZ_512K + SZ_256K, SZ_256K, DEVFS_PARTITION_FIXED, "env_raw"); + dev_add_bb_dev("env_raw", "env0"); + devfs_add_partition("nand0", SZ_1M, SZ_256K, DEVFS_PARTITION_FIXED, "env_raw1"); + dev_add_bb_dev("env_raw1", "env1"); + + return 0; +} +device_initcall(at91_tse_850_devices_init); + +static int at91_tse_850_console_init(void) +{ + barebox_set_model("Axentia TSE-850"); + barebox_set_hostname("tse"); + + at91_register_uart(0, 0); + at91_register_uart(2, 0); + return 0; +} +console_initcall(at91_tse_850_console_init); + +static int at91_tse_850_main_clock(void) +{ + at91_set_main_clock(12000000); + return 0; +} +pure_initcall(at91_tse_850_main_clock); diff --git a/arch/arm/configs/tse850_defconfig b/arch/arm/configs/tse850_defconfig new file mode 100644 index 000000000000..76611a8b18ad --- /dev/null +++ b/arch/arm/configs/tse850_defconfig @@ -0,0 +1,78 @@ +CONFIG_ARCH_SAMA5D3=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x60000 +CONFIG_AEABI=y +# CONFIG_CMD_ARM_CPUINFO is not set +CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_PBL_IMAGE=y +CONFIG_MMU=y +CONFIG_TEXT_BASE=0x26f00000 +CONFIG_MALLOC_SIZE=0xA00000 +CONFIG_EXPERIMENTAL=y +CONFIG_MALLOC_TLSF=y +CONFIG_PROMPT="TSE-850:" +CONFIG_LONGHELP=y +CONFIG_GLOB=y +CONFIG_PROMPT_HUSH_PS2="y" +CONFIG_HUSH_FANCY_PROMPT=y +CONFIG_CMDLINE_EDITING=y +CONFIG_AUTO_COMPLETE=y +CONFIG_CONSOLE_ACTIVATE_ALL=y +CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/tse850/env" +CONFIG_POLLER=y +CONFIG_RESET_SOURCE=y +CONFIG_CMD_EDIT=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_SAVEENV=y +CONFIG_CMD_EXPORT=y +CONFIG_CMD_PRINTENV=y +CONFIG_CMD_READLINE=y +CONFIG_CMD_TFTP=y +CONFIG_CMD_FILETYPE=y +CONFIG_CMD_ECHO_E=y +CONFIG_CMD_LOADB=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_FLASH=y +CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_VERBOSE=y +CONFIG_CMD_BOOTM_INITRD=y +CONFIG_CMD_BOOTM_OFTREE=y +CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y +CONFIG_CMD_UIMAGE=y +# CONFIG_CMD_BOOTU is not set +CONFIG_CMD_RESET=y +CONFIG_CMD_GO=y +CONFIG_CMD_OFTREE=y +CONFIG_CMD_MTEST=y +CONFIG_CMD_MTEST_ALTERNATIVE=y +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_PARTITION=y +CONFIG_CMD_WD=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MIITOOL=y +CONFIG_NET=y +CONFIG_NET_DHCP=y +CONFIG_NET_NFS=y +CONFIG_NET_PING=y +CONFIG_NET_NETCONSOLE=y +CONFIG_MICREL_PHY=y +CONFIG_DRIVER_NET_MACB=y +# CONFIG_SPI is not set +CONFIG_MTD=y +# CONFIG_MTD_OOB_DEVICE is not set +CONFIG_NAND=y +# CONFIG_NAND_ECC_SOFT is not set +# CONFIG_NAND_ECC_HW_SYNDROME is not set +# CONFIG_NAND_ECC_HW_NONE is not set +CONFIG_NAND_ATMEL=y +CONFIG_NAND_ATMEL_PMECC=y +CONFIG_UBI=y +CONFIG_DISK=y +CONFIG_DISK_WRITE=y +CONFIG_WATCHDOG=y +CONFIG_FS_EXT4=y +CONFIG_FS_TFTP=y +CONFIG_FS_FAT=y +CONFIG_FS_FAT_WRITE=y +CONFIG_FS_FAT_LFN=y +CONFIG_ZLIB=y diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 290178706a40..6e3d33694c05 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -539,6 +539,11 @@ config MACH_SAMA5D3_XPLAINED help Select this if you are using Atmel's SAMA5D3_XPLAINED Evaluation Kit. +config MACH_TSE850 + bool "Axentia TSE-850" + help + Select this if you are using Axentia's TSE-850. + endchoice endif -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: at91 sama5d3 "regressions" 2021-09-17 23:57 ` at91 sama5d3 "regressions" Peter Rosin @ 2021-09-19 6:32 ` Peter Rosin 2021-09-22 7:06 ` Ahmad Fatoum 0 siblings, 1 reply; 14+ messages in thread From: Peter Rosin @ 2021-09-19 6:32 UTC (permalink / raw) To: Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List On 2021-09-18 01:57, Peter Rosin wrote: > On 2021-09-18 00:37, Peter Rosin wrote: >> Hi! >> >> I have old boards that I'm trying to get up to current >> revisions of various pieces of software, and I'm running >> into a couple of problems with barebox. After bisecting >> and sorting though git history for a couple of days, >> these are my findings... > > I meant to mention that I'm using this extra patch for my board. > > As you can see, it's been a couple of years, and it is not at > all unlikely that the root cause is in these files, and that > there has been changes in the other parts of the sama5d3 code > that I need to pick up. > > I will dig into updating these files, and check if that help. Ok, it turns out I don't need to do that update, because the only thing that's actually used from the extra patch are the tse850_defconfig file and the environment. But since the tse850_defconfig file fails to set CONFIG_MACH_TSE850, the actual code in the extra patch is not used (not even compiled). Instead, the board code for sama5d3x is what I have been using all along. Big blush about that, and sorry for the confusion! However, the above also means that the quotes around the "regressions" word in the subject can be removed. The problems are squarely in the upstream code base, and I do need fixes for region overlap, eXecute Never and RO_DATA_SECTION. I have this hunch that the region overlap is what triggers the other problems, but that's a pretty wild guess... Cheers, Peter _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: at91 sama5d3 "regressions" 2021-09-19 6:32 ` Peter Rosin @ 2021-09-22 7:06 ` Ahmad Fatoum 2021-09-22 7:41 ` Peter Rosin 0 siblings, 1 reply; 14+ messages in thread From: Ahmad Fatoum @ 2021-09-22 7:06 UTC (permalink / raw) To: Peter Rosin, Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List Hi, On 19.09.21 08:32, Peter Rosin wrote: > On 2021-09-18 01:57, Peter Rosin wrote: >> On 2021-09-18 00:37, Peter Rosin wrote: >>> Hi! >>> >>> I have old boards that I'm trying to get up to current >>> revisions of various pieces of software, and I'm running >>> into a couple of problems with barebox. After bisecting >>> and sorting though git history for a couple of days, >>> these are my findings... >> >> I meant to mention that I'm using this extra patch for my board. >> >> As you can see, it's been a couple of years, and it is not at >> all unlikely that the root cause is in these files, and that >> there has been changes in the other parts of the sama5d3 code >> that I need to pick up. >> >> I will dig into updating these files, and check if that help. > > Ok, it turns out I don't need to do that update, because the > only thing that's actually used from the extra patch are the > tse850_defconfig file and the environment. But since the > tse850_defconfig file fails to set CONFIG_MACH_TSE850, the > actual code in the extra patch is not used (not even compiled). > Instead, the board code for sama5d3x is what I have been using > all along. Big blush about that, and sorry for the confusion! No worries. > However, the above also means that the quotes around the > "regressions" word in the subject can be removed. The problems > are squarely in the upstream code base, and I do need fixes > for region overlap, eXecute Never and RO_DATA_SECTION. I am interested in understanding how that breakage came about. I have a sama5d3_xplained here with NAND, which I will try to find some time to reproduce this on. For your immediate issue: I'd like to use the occasion to get all sama5d3 to probe from device tree. We already have one sama5d3 DT-enabled board upstream (microchip-ksz9477-evb) and I just CC'd you on a series to migrate the sama5d3_xplained from legacy board code to DT. I tested this boots correctly after at91bootstrap from NAND without your series here. The relevant defconfig is at91_multi_defconfig. It will generate a barebox-sama5d3-xplained.img, which should boot to shell on your board. If that works, we could create a new barebox-sama5d3xek.img image that does the same as barebox-sama5d3-xplained.img, but with different device tree and see if all peripherals you use still work. With everything nice and dandy, we could finally remove non-DT code for sama5d3 altogether and your board would reuse the same early bootstrap code basically all other platforms use and test. Sounds good? Cheers, Ahmad > > I have this hunch that the region overlap is what triggers > the other problems, but that's a pretty wild guess... > > Cheers, > Peter > > _______________________________________________ > barebox mailing list > barebox@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/barebox > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: at91 sama5d3 "regressions" 2021-09-22 7:06 ` Ahmad Fatoum @ 2021-09-22 7:41 ` Peter Rosin 0 siblings, 0 replies; 14+ messages in thread From: Peter Rosin @ 2021-09-22 7:41 UTC (permalink / raw) To: Ahmad Fatoum, Sascha Hauer, Ahmad Fatoum; +Cc: Barebox List Hi, On 2021-09-22 09:06, Ahmad Fatoum wrote: > On 19.09.21 08:32, Peter Rosin wrote: >> However, the above also means that the quotes around the >> "regressions" word in the subject can be removed. The problems >> are squarely in the upstream code base, and I do need fixes >> for region overlap, eXecute Never and RO_DATA_SECTION. > > I am interested in understanding how that breakage came about. > I have a sama5d3_xplained here with NAND, which I will try to > find some time to reproduce this on. > > For your immediate issue: I'd like to use the occasion to get > all sama5d3 to probe from device tree. We already have one > sama5d3 DT-enabled board upstream (microchip-ksz9477-evb) and > I just CC'd you on a series to migrate the sama5d3_xplained > from legacy board code to DT. I tested this boots correctly > after at91bootstrap from NAND without your series here. > > The relevant defconfig is at91_multi_defconfig. It will generate > a barebox-sama5d3-xplained.img, which should boot to shell > on your board. > > If that works, we could create a new barebox-sama5d3xek.img image > that does the same as barebox-sama5d3-xplained.img, but with > different device tree and see if all peripherals you use > still work. > > > With everything nice and dandy, we could finally remove non-DT > code for sama5d3 altogether and your board would reuse the same > early bootstrap code basically all other platforms use and test. > > Sounds good? That sounds like the right way to fix things. Thanks! Cheers, Peter _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2021-09-22 7:43 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-09-17 22:37 at91 sama5d3 "regressions" Peter Rosin 2021-09-17 22:39 ` [PATCH 1/4] common.h: reintroduce region_overlap() as, old_region_overlap() Peter Rosin 2021-09-17 22:39 ` [PATCH 2/4] ARM: copy data if there is a region overlap Peter Rosin 2021-09-17 22:40 ` [PATCH 3/4] Revert "ARM: mmu: use client domain permissions to support ARMv7 eXecute Never" Peter Rosin 2021-09-19 7:06 ` Rouven Czerwinski 2021-09-19 7:50 ` Peter Rosin 2021-09-19 20:33 ` Peter Rosin 2021-09-20 9:14 ` Ahmad Fatoum 2021-09-20 10:22 ` Peter Rosin 2021-09-17 22:41 ` [PATCH 4/4] lds: the RO_DATA_SECTION macro does not work on my SAMA5D3 board Peter Rosin 2021-09-17 23:57 ` at91 sama5d3 "regressions" Peter Rosin 2021-09-19 6:32 ` Peter Rosin 2021-09-22 7:06 ` Ahmad Fatoum 2021-09-22 7:41 ` Peter Rosin
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