From: Sascha Hauer <s.hauer@pengutronix.de>
To: BAREBOX <barebox@lists.infradead.org>,
Michael Tretter <m.tretter@pengutronix.de>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Subject: Re: [PATCH 0/9] arm: socfpga: agilex5: rework low level code
Date: Fri, 17 Apr 2026 10:25:37 +0200 [thread overview]
Message-ID: <177641433789.133703.9329690482278940815.b4-ty@pengutronix.de> (raw)
In-Reply-To: <20260416-socfpga-agilex5-sdram-v1-0-07556aa7219f@pengutronix.de>
On Thu, 16 Apr 2026 11:48:04 +0200, Michael Tretter wrote:
> The available SDRAM on an Agilex 5 system isn't fixed, but may change
> based on the system configuration. If inline ECC is enabled, 1/8 of the
> SDRAM is used for checksums. The memory reserved for the TF-A is also
> not usable by barebox. Thus, using hard-coded memory limits is not
> sufficient even on a board level.
>
> Rework the Agilex 5 low level code to respect the memory configuration
> by reading the available memory from the firewall configuration. The
> rework also allows moving the entry code from board-specific code to SoC
> specific code.
>
> [...]
Applied, thanks!
[1/9] arm: socfpga: agilex5: cleanup TF-A loading
https://git.pengutronix.de/cgit/barebox/commit/?id=0c29366bb423 (link may not be stable)
[2/9] arm: socfgpa: agilex5: remove unused memsize
https://git.pengutronix.de/cgit/barebox/commit/?id=0585325d22e1 (link may not be stable)
[3/9] arm: socfpga: agilex5: configure firewall with base and size
https://git.pengutronix.de/cgit/barebox/commit/?id=3c77c7702144 (link may not be stable)
[4/9] arm: socfpga: agilex5: fix read of memory limit
https://git.pengutronix.de/cgit/barebox/commit/?id=6c793c193a3c (link may not be stable)
[5/9] arm: socfpga: agilex5: fix SDRAM size calculation
https://git.pengutronix.de/cgit/barebox/commit/?id=f32b6ba416d6 (link may not be stable)
[6/9] arm: socfpga: agilex5: remove unused declarations
https://git.pengutronix.de/cgit/barebox/commit/?id=65a993521e70 (link may not be stable)
[7/9] arm: socfpga: agilex5: read SDRAM limits from firewall
https://git.pengutronix.de/cgit/barebox/commit/?id=db3c90dc335b (link may not be stable)
[8/9] arm: socfpga: agilex5: add agilex5_barebox_entry
https://git.pengutronix.de/cgit/barebox/commit/?id=a14292c6b54c (link may not be stable)
[9/9] arm: socfpga: agilex5: add explicit unreachable after TF-A load
https://git.pengutronix.de/cgit/barebox/commit/?id=57419d18bd2f (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
prev parent reply other threads:[~2026-04-17 8:26 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-16 9:48 Michael Tretter
2026-04-16 9:48 ` [PATCH 1/9] arm: socfpga: agilex5: cleanup TF-A loading Michael Tretter
2026-04-16 9:48 ` [PATCH 2/9] arm: socfgpa: agilex5: remove unused memsize Michael Tretter
2026-04-16 9:48 ` [PATCH 3/9] arm: socfpga: agilex5: configure firewall with base and size Michael Tretter
2026-04-16 9:48 ` [PATCH 4/9] arm: socfpga: agilex5: fix read of memory limit Michael Tretter
2026-04-16 9:48 ` [PATCH 5/9] arm: socfpga: agilex5: fix SDRAM size calculation Michael Tretter
2026-04-16 9:48 ` [PATCH 6/9] arm: socfpga: agilex5: remove unused declarations Michael Tretter
2026-04-16 9:48 ` [PATCH 7/9] arm: socfpga: agilex5: read SDRAM limits from firewall Michael Tretter
2026-04-16 9:48 ` [PATCH 8/9] arm: socfpga: agilex5: add agilex5_barebox_entry Michael Tretter
2026-04-16 9:48 ` [PATCH 9/9] arm: socfpga: agilex5: add explicit unreachable after TF-A load Michael Tretter
2026-04-17 8:25 ` Sascha Hauer [this message]
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