[PATCH 0/9] arm: socfpga: agilex5: rework low level code

[Michael Tretter <m.tretter@pengutronix.de>]

The available SDRAM on an Agilex 5 system isn't fixed, but may change
based on the system configuration. If inline ECC is enabled, 1/8 of the
SDRAM is used for checksums. The memory reserved for the TF-A is also
not usable by barebox. Thus, using hard-coded memory limits is not
sufficient even on a board level.

Rework the Agilex 5 low level code to respect the memory configuration
by reading the available memory from the firewall configuration. The
rework also allows moving the entry code from board-specific code to SoC
specific code.

Patch 1 and 2 clean the TF-A loading as preparation.

Patch 3 to 6 clean and fix the setup and read back of the firewall
configuration.

Patch 7 switches the Arrow AXE5-Eagle development board from fixed
memory limits to the memory limits from the firewall configuration.

Patches 8 and 9 extract the now reusable lowlevel code from the
board-specific code.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
Michael Tretter (9):
      arm: socfpga: agilex5: cleanup TF-A loading
      arm: socfgpa: agilex5: remove unused memsize
      arm: socfpga: agilex5: configure firewall with base and size
      arm: socfpga: agilex5: fix read of memory limit
      arm: socfpga: agilex5: fix SDRAM size calculation
      arm: socfpga: agilex5: remove unused declarations
      arm: socfpga: agilex5: read SDRAM limits from firewall
      arm: socfpga: agilex5: add agilex5_barebox_entry
      arm: socfpga: agilex5: add explicit unreachable after TF-A load

 arch/arm/boards/arrow-axe5-eagle/lowlevel.c | 30 +--------------
 arch/arm/mach-socfpga/agilex5-sdram.c       | 27 ++++++-------
 arch/arm/mach-socfpga/atf.c                 | 59 ++++++++++++++++++++++++-----
 include/mach/socfpga/generic.h              |  2 +-
 include/mach/socfpga/soc64-sdram.h          | 36 +++++++++---------
 5 files changed, 82 insertions(+), 72 deletions(-)
---
base-commit: 2f83a1e9e4ecf9f2fe1948550801c27a60769d2b
change-id: 20260416-socfpga-agilex5-sdram-e2a429635bac

Best regards,
-- 
Michael Tretter <m.tretter@pengutronix.de>