[RFC PATCH 13/17] RISC-V: beaglev: migrate to board info entry point

[Ahmad Fatoum <a.fatoum@barebox.org>]

OpenSBI starts the BeagleV image below the 512M at 0x84000000 that
barebox gets. Instead of relocating in place and having
barebox_pbl_start() copy the PBL again, the stage names the region as
relocaddr, so the PBL is relocated once, directly into it.

DEBUG_LL init and nmon go into the CPU init callback, which runs before
relocation like the old entry point did. The '>' is now printed by the
stage dispatch.

Assisted-by: Claude:opus-5.5
Signed-off-by: Ahmad Fatoum <a.fatoum@barebox.org>
---
 arch/riscv/boards/beaglev/lowlevel.c | 30 +++++++++++++++++++---------
 1 file changed, 21 insertions(+), 9 deletions(-)

diff --git a/arch/riscv/boards/beaglev/lowlevel.c b/arch/riscv/boards/beaglev/lowlevel.c
index db884dc762ce..b2eab26c3ca5 100644
--- a/arch/riscv/boards/beaglev/lowlevel.c
+++ b/arch/riscv/boards/beaglev/lowlevel.c
@@ -2,19 +2,31 @@
 
 #include <common.h>
 #include <debug_ll.h>
+#include <pbl/entry.h>
 #include <asm/barebox-riscv.h>
 #include <asm/riscv_nmon.h>
 
-ENTRY_FUNCTION(start_beaglev_starlight, a0, a1, a2)
-{
-	extern char __dtb_z_jh7100_beaglev_starlight_start[];
-	void *fdt;
+#define BEAGLEV_MEM_BASE	0x84000000
 
+extern char __dtb_z_jh7100_beaglev_starlight_start[];
+
+static void __prereloc beaglev_cpu_init(void)
+{
 	debug_ll_init();
 	barebox_nmon_entry();
-	putc_ll('>');
-
-	fdt = __dtb_z_jh7100_beaglev_starlight_start + get_runtime_offset();
-
-	barebox_riscv_supervisor_entry(0x84000000, SZ_512M, a0, fdt);
 }
+
+/*
+ * OpenSBI starts its payload below the memory handed to barebox, so the
+ * PBL relocates there first.
+ */
+ENTRY_POINT_HEAD(start_beaglev_starlight, __barebox_pbl_head_v1_supervisor)
+	.soc_type = SOC_TYPE_JH7100,
+	.second_stage.stacktop = BEAGLEV_MEM_BASE + SZ_512M,
+	.second_stage.relocaddr = BEAGLEV_MEM_BASE,
+	.second_stage.mem_start = BEAGLEV_MEM_BASE,
+	.second_stage.mem_minsz = SZ_512M,
+	.second_stage.board_data = __dtb_z_jh7100_beaglev_starlight_start,
+	.second_stage.prereloc_cpu_init = beaglev_cpu_init,
+	.second_stage.soc_chainload = pbl_stage_barebox_entry,
+ENTRY_POINT_END
-- 
2.47.3