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From: Ahmad Fatoum <a.fatoum@barebox.org>
To: barebox@lists.infradead.org
Cc: mfe@pengutronix.de, mtr@pengutronix.de,
	Ahmad Fatoum <a.fatoum@barebox.org>
Subject: [RFC PATCH 07/17] RISC-V: make barebox_riscv_entry() non-naked
Date: Tue, 27 Oct 2026 08:24:40 +0100	[thread overview]
Message-ID: <20261027074014.3280396-8-a.fatoum@barebox.org> (raw)
In-Reply-To: <20261027074014.3280396-1-a.fatoum@barebox.org>

barebox_riscv_entry() is a naked function that switches the stack with
inline assembly and then continues in C. GCC only supports basic asm in
naked functions and clang rejects anything else outright.

Let's move the stack switch into an assembly __barebox_riscv_entry() like
on ARM. barebox_riscv_entry() becomes an always inlined function, so the
naked ENTRY_FUNCTION()s, which may run without a stack, can still call it.

Assisted-by: Claude:opus-5.5
Signed-off-by: Ahmad Fatoum <a.fatoum@barebox.org>
---
 arch/riscv/boot/Makefile               |  2 +-
 arch/riscv/boot/entry.c                | 31 --------------------------
 arch/riscv/boot/entry_ll.S             | 15 +++++++++++++
 arch/riscv/include/asm/barebox-riscv.h | 30 ++++++++++++++++++++++---
 4 files changed, 43 insertions(+), 35 deletions(-)
 delete mode 100644 arch/riscv/boot/entry.c
 create mode 100644 arch/riscv/boot/entry_ll.S

diff --git a/arch/riscv/boot/Makefile b/arch/riscv/boot/Makefile
index 936f6e2e0391..2cd6f098d5ef 100644
--- a/arch/riscv/boot/Makefile
+++ b/arch/riscv/boot/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
-pbl-y += entry.o uncompress.o
+pbl-y += entry_ll.o uncompress.o
 pbl-y += nmon_entry.o
 pbl-$(CONFIG_BOARD_GENERIC_DT) += board-dt-2nd.o
diff --git a/arch/riscv/boot/entry.c b/arch/riscv/boot/entry.c
deleted file mode 100644
index f5a536fc78a9..000000000000
--- a/arch/riscv/boot/entry.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#include <types.h>
-
-#include <asm/barebox-riscv.h>
-
-#include "entry.h"
-#include <debug_ll.h>
-
-/*
- * Main RISC-V entry point. Call this with the memory region you can
- * spare for barebox. This doesn't necessarily have to be the full
- * SDRAM. The currently running binary can be inside or outside of
- * this region. The PBL can be running inside or outside of this
- * region.
- *
- * -> membase + memsize
- *   STACK_SIZE              - stack
- *   128KiB                  - early memory space
- * -> maximum end of barebox binary
- */
-
-void __noreturn __naked barebox_riscv_entry(unsigned long membase,
-					    unsigned long memsize, void *boarddata,
-					    unsigned flags)
-{
-	unsigned long stack_top = riscv_mem_stack_top(membase, membase + memsize);
-	asm volatile ("move sp, %0" : : "r"(stack_top));
-	riscv_set_flags(flags);
-	barebox_pbl_start(membase, memsize, boarddata);
-}
-
diff --git a/arch/riscv/boot/entry_ll.S b/arch/riscv/boot/entry_ll.S
new file mode 100644
index 000000000000..3611d72a3a78
--- /dev/null
+++ b/arch/riscv/boot/entry_ll.S
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <linux/linkage.h>
+
+/*
+ * a0: memory base
+ * a1: memory size
+ * a2: board data
+ * a3: new value for SP
+ */
+.section .text.__barebox_riscv_entry
+ENTRY(__barebox_riscv_entry)
+	mv	sp, a3
+	tail	barebox_pbl_start
+ENDPROC(__barebox_riscv_entry)
diff --git a/arch/riscv/include/asm/barebox-riscv.h b/arch/riscv/include/asm/barebox-riscv.h
index 9fdffb213e8c..4a7726ddc508 100644
--- a/arch/riscv/include/asm/barebox-riscv.h
+++ b/arch/riscv/include/asm/barebox-riscv.h
@@ -25,9 +25,6 @@
 #include <asm/reloc.h>
 #include <pbl/handoff-data.h>
 
-void __noreturn __naked barebox_riscv_entry(unsigned long membase, unsigned long memsize,
-					    void *boarddata, unsigned int flags);
-
 #define barebox_riscv_machine_entry(membase, memsize, boarddata) \
 	barebox_riscv_entry(membase, memsize, boarddata, RISCV_M_MODE)
 
@@ -82,6 +79,33 @@ static inline unsigned long riscv_mem_barebox_image(unsigned long membase,
 	return ALIGN_DOWN(endmem - size, SZ_1M);
 }
 
+void __noreturn __barebox_riscv_entry(unsigned long membase,
+				      unsigned long memsize, void *boarddata,
+				      unsigned long sp);
+
+/*
+ * Main RISC-V entry point. Call this with the memory region you can
+ * spare for barebox. This doesn't necessarily have to be the full
+ * SDRAM. The currently running binary can be inside or outside of
+ * this region. The PBL can be running inside or outside of this
+ * region.
+ *
+ * -> membase + memsize
+ *   STACK_SIZE              - stack
+ *   128KiB                  - early memory space
+ * -> maximum end of barebox binary
+ *
+ * Inline, so naked ENTRY_FUNCTION()s can call it without a stack.
+ */
+static __always_inline void __noreturn
+barebox_riscv_entry(unsigned long membase, unsigned long memsize,
+		    void *boarddata, unsigned int flags)
+{
+	riscv_set_flags(flags);
+	__barebox_riscv_entry(membase, memsize, boarddata,
+			      riscv_mem_stack_top(membase, membase + memsize));
+}
+
 #define ENTRY_FUNCTION(name, arg0, arg1, arg2)                          \
 	void name (ulong r0, ulong r1, ulong r2);                       \
 	static void __##name(ulong, ulong, ulong);                      \
-- 
2.47.3




  parent reply	other threads:[~2026-10-27  7:45 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-27  7:24 [RFC PATCH 00/17] Switch RISC-V to declarative entry points Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 01/17] asm-generic: add registers.h with a pc_inside() helper Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 02/17] RISC-V: add call_with_stack() helper Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 03/17] RISC-V: implement relocate_to_adr_full() Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 04/17] PBL: add SoC type declaration and handoff support Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 05/17] PBL: introduce board info based entry point framework Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 06/17] PBL: describe the console in the board info and report the stage Ahmad Fatoum
2026-10-27  7:24 ` Ahmad Fatoum [this message]
2026-10-27  7:24 ` [RFC PATCH 08/17] RISC-V: add PBL heads for the board info stage dispatch Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 09/17] RISC-V: board-dt-2nd: migrate to board info entry point Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 10/17] RISC-V: hifive: " Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 11/17] RISC-V: allow relocating the PBL more than once Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 12/17] RISC-V: nmon: preserve s1-s3 for the caller Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 13/17] RISC-V: beaglev: migrate to board info entry point Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 14/17] RISC-V: allwinner-d1: " Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 15/17] RISC-V: erizo: " Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 16/17] RISC-V: litex-linux: " Ahmad Fatoum
2026-10-27  7:24 ` [RFC PATCH 17/17] Documentation: porting: describe the " Ahmad Fatoum

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